ATF1508ASV-15AU100 Atmel, ATF1508ASV-15AU100 Datasheet - Page 9

IC CPLD 15NS LOW V 100TQFP

ATF1508ASV-15AU100

Manufacturer Part Number
ATF1508ASV-15AU100
Description
IC CPLD 15NS LOW V 100TQFP
Manufacturer
Atmel
Series
ATF1508ASV(L)r
Datasheet

Specifications of ATF1508ASV-15AU100

Programmable Type
In System Programmable (min 10K program/erase cycles)
Delay Time Tpd(1) Max
15.0ns
Voltage Supply - Internal
3 V ~ 3.6 V
Number Of Macrocells
128
Number Of I /o
80
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
100-TQFP, 100-VQFP
Voltage
3.3V
Memory Type
EEPROM
Number Of Product Terms Per Macro
40
Maximum Operating Frequency
100 MHz
Delay Time
15 ns
Number Of Programmable I/os
80
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Supply Voltage (max)
3.6 V
Supply Voltage (min)
3 V
For Use With
ATF15XX-DK3 - KIT DEV FOR ATF15XX CPLD'S
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Number Of Logic Elements/cells
-
Lead Free Status / Rohs Status
 Details

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Part Number
Manufacturer
Quantity
Price
Part Number:
ATF1508ASV-15AU100
Manufacturer:
ATMEL
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Programming
ISP Programming
Protection
1408H–PLD–7/05
ATF1508ASV(L) devices are in-system programmable (ISP) devices utilizing the 4-pin
JTAG protocol. This capability eliminates package handling normally required for pro-
gramming and facilitates rapid design iterations and field changes.
A t m e l p r o v i d e s I S P h a r d w a r e a n d s o f t w a r e t o a l l o w p r o g r a m m i n g o f t h e
ATF1508ASV(L) via the PC. ISP is performed by using either a download cable, a com-
parable board tester or a simple microprocessor interface.
To allow ISP programming support by the Automated Test Equipment (ATE) vendors,
Serial Vector Format (SVF) files can be created by the Atmel ISP software. Conversion
to other ATE tester format beside SVF is also possible
ATF1508ASV(L) devices can also be programmed using standard third-party program-
mers. With third-party programmer, the JTAG ISP port can be disabled thereby allowing
four additional I/O pins to be used for logic.
Contact your local Atmel representatives or Atmel PLD applications for details.
The ATF1508ASV(L) has a special feature that locks the device and prevents the inputs
and I/O from driving if the programming process is interrupted for any reason. The
inputs and I/O default to high-Z state during such a condition. In addition the pin-keeper
option preserves the former state during device programming.
All ATF1508ASV(L) devices are initially shipped in the erased state thereby making
them ready to use for ISP.
Note:
For more information refer to the “Designing for In-System Programmability with Atmel
CPLDs” application note.
ATF1508ASV(L)
9

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