XC5VLX50-1FFG1153C Xilinx Inc, XC5VLX50-1FFG1153C Datasheet - Page 189

• Manufacturer Part Number: XC5VLX50-1FFG1153C
• Description: IC FPGA VIRTEX-5 50K 1153FBGA
• Manufacturer: Xilinx Inc
• Series: Virtex™-5 LXr

Specifications of XC5VLX50-1FFG1153C

• Total Ram Bits: 1769472
• Number Of Logic Elements/cells: 46080
• Number Of Labs/clbs: 3600
• Number Of I /o: 560
• Voltage - Supply: 0.95 V ~ 1.05 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 1153-BBGA, FCBGA
• No. Of Logic Blocks: 3600
• No. Of Macrocells: 50000
• Family Type: Virtex-5
• No. Of Speed Grades: 1
• No. Of I/o's: 560
• Clock Management: DCM, PLL
• Core Supply: RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: HW-V5-ML561-UNI-G - EVALUATION PLATFORM VIRTEX-5HW-V5-ML550-UNI-G - EVALUATION PLATFORM VIRTEX-5HW-V5-ML521-UNI-G - EVALUATION PLATFORM VIRTEX-5HW-V5GBE-DK-UNI-G - KIT DEV V5 LXT GIGABIT ETHERNET122-1508 - EVALUATION PLATFORM VIRTEX-5
• Number Of Gates: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 122-1561

Virtex-5 FPGA User Guide
UG190 (v5.3) May 17, 2010
X-Ref Target - Figure 5-14
Distributed RAM configurations greater than the provided examples require more than
one SLICEM. There are no direct connections between slices to form larger distributed
RAM configurations within a CLB or between slices.
WCLK
A[7:0]
WE
D
(WE/CE)
Figure 5-14: Distributed RAM (RAM256X1S)
(CLK)
www.xilinx.com
6
8
6
8
6
8
6
8
DI1
A[6:1]
WA[8:1]
CLK
WE
DI1
A[6:1]
WA[8:1]
CLK
WE
DI1
A[6:1]
WA[8:1]
CLK
WE
DI1
A[6:1]
WA[8:1]
CLK
WE
RAM256X1S
SPRAM64
SPRAM64
SPRAM64
SPRAM64
O6
O6
O6
O6
F7BMUX
F7AMUX
A6 (AX)
A6 (CX)
F8MUX
A7 (BX)
O
D Q
CLB Overview
(Optional)
UG190_5_14_050506
Output
Registered
Output
189