XC5VLX50-1FFG1153C Xilinx Inc, XC5VLX50-1FFG1153C Datasheet - Page 76

• Manufacturer Part Number: XC5VLX50-1FFG1153C
• Description: IC FPGA VIRTEX-5 50K 1153FBGA
• Manufacturer: Xilinx Inc
• Series: Virtex™-5 LXr

Specifications of XC5VLX50-1FFG1153C

• Total Ram Bits: 1769472
• Number Of Logic Elements/cells: 46080
• Number Of Labs/clbs: 3600
• Number Of I /o: 560
• Voltage - Supply: 0.95 V ~ 1.05 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 1153-BBGA, FCBGA
• No. Of Logic Blocks: 3600
• No. Of Macrocells: 50000
• Family Type: Virtex-5
• No. Of Speed Grades: 1
• No. Of I/o's: 560
• Clock Management: DCM, PLL
• Core Supply: RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: HW-V5-ML561-UNI-G - EVALUATION PLATFORM VIRTEX-5HW-V5-ML550-UNI-G - EVALUATION PLATFORM VIRTEX-5HW-V5-ML521-UNI-G - EVALUATION PLATFORM VIRTEX-5HW-V5GBE-DK-UNI-G - KIT DEV V5 LXT GIGABIT ETHERNET122-1508 - EVALUATION PLATFORM VIRTEX-5
• Number Of Gates: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 122-1561

Chapter 2: Clock Management Technology
X-Ref Target - Figure 2-9
76
Outside FPGA
Inside FPGA
IBUFG
IBUFG
Figure 2-9: Board-Level Clock Using DDR Register with External Feedback
X-Ref Target - Figure 2-10
CLKIN
CLKFB
RST
PSINCDEC
PSEN
PSCLK
DADDR[6:0]
DI[15:0]
DWE
DEN
DCLK
IBUFG
DCM_ADV
Figure 2-10: Board-Level Clock with Internal Feedback
CLKIN
CLKFB
RST
PSINCDEC
PSEN
PSCLK
DADDR[6:0]
DI[15:0]
DWE
DEN
DCLK
CLKFX180
CLK2X180
LOCKED
DO(15:0)
CLK180
CLK270
CLKDV
CLKFX
CLK2X
CLK90
CLK0
DCM_ADV
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CLKFX180
CLK2X180
BUFG
LOCKED
DO(15:0)
CLK180
CLK270
CLKDV
CLKFX
CLK2X
CLK90
CLK0
V
GND
CC
BUFG
D1
D2
C
ODDR
V
GND
CC
UG190_2_09_042308
Virtex-5 FPGA User Guide
UG190 (v5.3) May 17, 2010
Q
D1
D2
C
ODDR
ug190_2_11_032506
Q