XC5VLX50-1FFG1153C Xilinx Inc, XC5VLX50-1FFG1153C Datasheet - Page 261

• Manufacturer Part Number: XC5VLX50-1FFG1153C
• Description: IC FPGA VIRTEX-5 50K 1153FBGA
• Manufacturer: Xilinx Inc
• Series: Virtex™-5 LXr

Specifications of XC5VLX50-1FFG1153C

• Total Ram Bits: 1769472
• Number Of Logic Elements/cells: 46080
• Number Of Labs/clbs: 3600
• Number Of I /o: 560
• Voltage - Supply: 0.95 V ~ 1.05 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 1153-BBGA, FCBGA
• No. Of Logic Blocks: 3600
• No. Of Macrocells: 50000
• Family Type: Virtex-5
• No. Of Speed Grades: 1
• No. Of I/o's: 560
• Clock Management: DCM, PLL
• Core Supply: RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: HW-V5-ML561-UNI-G - EVALUATION PLATFORM VIRTEX-5HW-V5-ML550-UNI-G - EVALUATION PLATFORM VIRTEX-5HW-V5-ML521-UNI-G - EVALUATION PLATFORM VIRTEX-5HW-V5GBE-DK-UNI-G - KIT DEV V5 LXT GIGABIT ETHERNET122-1508 - EVALUATION PLATFORM VIRTEX-5
• Number Of Gates: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 122-1561

X-Ref Target - Figure 6-51
Virtex-5 FPGA User Guide
UG190 (v5.3) May 17, 2010
External Termination
DCI
HSTL_IV_DCI
HSTL_IV
V
REF
V
REF
Figure 6-51
for HSTL Class IV.
= 0.9V
= 0.9V
IOB
Figure 6-51: HSTL Class IV Bidirectional Termination
R
VRP
= Z 0 = 50Ω
shows a sample circuit illustrating a valid bidirectional termination technique
V
V
TT
CCO
= 1.5V
R P = Z 0 = 50Ω
= 1.5V
IOB
www.xilinx.com
Z 0
R P = Z 0 = 50Ω
Z 0
Specific Guidelines for I/O Supported Standards
V
TT
IOB
V
= 1.5V
CCO
R
= 1.5V
VRP
IOB
= Z 0 = 50Ω
V
REF
V
REF
= 0.9V
= 0.9V
HSTL_IV_DCI
HSTL_IV
+
–
+
–
ug190_6_49_030306
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