XC5VLX50-1FFG1153C Xilinx Inc, XC5VLX50-1FFG1153C Datasheet - Page 88

IC FPGA VIRTEX-5 50K 1153FBGA

XC5VLX50-1FFG1153C

Manufacturer Part Number
XC5VLX50-1FFG1153C
Description
IC FPGA VIRTEX-5 50K 1153FBGA
Manufacturer
Xilinx Inc
Series
Virtex™-5 LXr

Specifications of XC5VLX50-1FFG1153C

Total Ram Bits
1769472
Number Of Logic Elements/cells
46080
Number Of Labs/clbs
3600
Number Of I /o
560
Voltage - Supply
0.95 V ~ 1.05 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
1153-BBGA, FCBGA
No. Of Logic Blocks
3600
No. Of Macrocells
50000
Family Type
Virtex-5
No. Of Speed Grades
1
No. Of I/o's
560
Clock Management
DCM, PLL
Core Supply
RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
HW-V5-ML561-UNI-G - EVALUATION PLATFORM VIRTEX-5HW-V5-ML550-UNI-G - EVALUATION PLATFORM VIRTEX-5HW-V5-ML521-UNI-G - EVALUATION PLATFORM VIRTEX-5HW-V5GBE-DK-UNI-G - KIT DEV V5 LXT GIGABIT ETHERNET122-1508 - EVALUATION PLATFORM VIRTEX-5
Number Of Gates
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
122-1561

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Chapter 2: Clock Management Technology
Legacy Support
88
The Virtex-5 FPGA DCMs (DCM_BASE and DCM_ADV) have exactly the same port
names as the Virtex-4 FPGA DCMs. However, the DRP address mapping has changed.
Refer to the Virtex-5 FPGA Configuration Guide for more information.
The Virtex-5 device supports the Virtex-II family and Virtex-II Pro FPGA DCM primitives.
The mapping of Virtex-II or Virtex-II Pro FPGA DCMs to Virtex-5 FPGA DCM_ADVs are
as follows:
CLKIN, CLKFB, PSCLK, PSINDEC, PSEN, RST, CLK0, CLK90, CLK180, CLK270,
CLK2X, CLK2X180, CLKFX, CLKFX180, CLKDV, PSDONE, LOCKED of Virtex-5
FPGA primitives (DCM_BASE/DCM_ADV) map to the same corresponding pins of a
Virtex-II or Virtex-II Pro FPGA DCM.
Dynamic reconfiguration pins of Virtex-5 FPGA DCM_ADV are not accessible when a
Virtex-II or Virtex-II Pro FPGA DCM is used, except for DO[15:0].
DO[7:0] pins of Virtex-5 FPGA DCM_ADV map to Status[7:0] of the Virtex-II or
Virtex-II Pro FPGA DCMs. DO[15:8] of DCM_ADV are not available when using
Virtex-II or Virtex-II Pro FPGA DCMs.
www.xilinx.com
Virtex-5 FPGA User Guide
UG190 (v5.3) May 17, 2010

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