EP1S20F672C6 Altera, EP1S20F672C6 Datasheet - Page 100

• Manufacturer Part Number: EP1S20F672C6
• Description: IC STRATIX FPGA 20K LE 672-FBGA
• Manufacturer: Altera
• Series: Stratix®r

Specifications of EP1S20F672C6

• Number Of Logic Elements/cells: 18460
• Number Of Labs/clbs: 1846
• Total Ram Bits: 1669248
• Number Of I /o: 426
• Voltage - Supply: 1.425 V ~ 1.575 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 672-FBGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Number Of Gates: -
• Other names: 544-1853; EP1S20F672C6

PLLs & Clock Networks
Figure 2–51. Global & Regional Clock Connections from Top Clock Pins & Enhanced PLL Outputs
Notes to
(1)
(2)
(3)
(4)
2–86
Stratix Device Handbook, Volume 1
PLLs 1 to 4 and 7 to 10 are fast PLLs. PLLs 5, 6, 11, and 12 are enhanced PLLs.
CLK4, CLK6, CLK12, and CLK14 feed the corresponding PLL’s inclk0 port.
CLK5, CLK7, CLK13, and CLK15 feed the corresponding PLL’s inclk1 port.
The EP1S40 device in the 780-pin FineLine BGA package does not support PLLs 11 and 12.
Figure
Regional
Regional
Clocks
Clocks
2–51:
Clocks
Global
RCLK2
RCLK3
RCLK6
RCLK7
L0 L1 G0 G1 G2 G3
L0 L1 G0 G1 G2 G3
E[0..3]
PLL 6
PLL 5
(1)
(2)
(2)
(1)
G0 G1 G2 G3 L0 L1
G0 G1 G2 G3 L0 L1
(1)
PLL 11
(1)
PLL 12
(2)
(2)
RCLK10
RCLK11
G12
G13
G14
G15
G4
G5
G6
G7
RCLK12
RCLK13
Altera Corporation
Note (1)
July 2005