EP1S20F780I6N Altera, EP1S20F780I6N Datasheet - Page 629

• Manufacturer Part Number: EP1S20F780I6N
• Description: IC STRATIX FPGA 20K LE 780-FBGA
• Manufacturer: Altera
• Series: Stratix®r

Specifications of EP1S20F780I6N

• Number Of Logic Elements/cells: 18460
• Number Of Labs/clbs: 1846
• Total Ram Bits: 1669248
• Number Of I /o: 586
• Voltage - Supply: 1.425 V ~ 1.575 V
• Mounting Type: Surface Mount
• Operating Temperature: -40°C ~ 100°C
• Package / Case: 780-FBGA
• Family Name: Stratix
• Number Of Logic Blocks/elements: 18460
• # I/os (max): 586
• Frequency (max): 450.05MHz
• Process Technology: 0.13um (CMOS)
• Operating Supply Voltage (typ): 1.5V
• Logic Cells: 18460
• Ram Bits: 1669248
• Operating Supply Voltage (min): 1.425V
• Operating Supply Voltage (max): 1.575V
• Operating Temp Range: -40C to 100C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 780
• Package Type: FC-FBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -
• Lead Free Status / Rohs Status: Compliant

Figure 7–31. Details on Implementation of Symmetric 3
Altera Corporation
September 2004
B
C
A
Note: Unused multipliers and adders grayed out. These
multipliers can be used by other functions.
Implementing High Performance DSP Functions in Stratix & Stratix GX Devices
Logic Elements
In cases where a symmetric 2-D filter is used, pixels sharing the same
filter coefficients from three separate line-stores A, B, and C can be added
together prior to the multiplication operation. This reduces the number of
multipliers used. Referring to
coefficients.
symmetric filter.
Figure 7–30. Symmetric 3
Figure 7–31
shows the implementation of this circular
3 Kernel
3 Convolution Filter Block
Figure
GND
GND
w
w
w w
w
w w
1
2
3
7–30, w
DSP Block - Four Multipliers
Stratix Device Handbook, Volume 2
Adder Mode (9-bit)
1
, w
2
, and w
3
are the filter
y y (m , n )
7–51