XC5VSX50T-2FF665C Xilinx Inc, XC5VSX50T-2FF665C Datasheet - Page 234

• Manufacturer Part Number: XC5VSX50T-2FF665C
• Description: IC FPGA VIRTEX-5 50K 665FCBGA
• Manufacturer: Xilinx Inc
• Series: Virtex™-5 SXTr

Specifications of XC5VSX50T-2FF665C

• Number Of Logic Elements/cells: 52224
• Number Of Labs/clbs: 4080
• Total Ram Bits: 4866048
• Number Of I /o: 360
• Voltage - Supply: 0.95 V ~ 1.05 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 665-BBGA, FCBGA
• For Use With: HW-V5-ML506-UNI-G - EVALUATION PLATFORM VIRTEX-5
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Number Of Gates: -

Chapter 6: SelectIO Resources
234
OBUFT
IOBUF
IBUFDS and IBUFGDS
The generic 3-state output buffer OBUFT, shown in
3-state outputs or bidirectional I/O.
X-Ref Target - Figure 6-20
The IOBUF primitive is needed when bidirectional signals require both an input buffer and
a 3-state output buffer with an active High 3-state pin.
FPGA IOBUF.
X-Ref Target - Figure 6-21
The usage and rules corresponding to the differential primitives are similar to the single-
ended SelectIO primitives. Differential SelectIO primitives have two pins to and from the
device pads to show the P and N channel pins in a differential pair. N channel pins have a
“B” suffix.
Figure 6-22
X-Ref Target - Figure 6-22
Figure 6-22: Differential Input Buffer Primitive (IBUFDS/IBUFGDS)
shows the differential input buffer primitive
Figure 6-20: 3-State Output Buffer (OBUFT) Primitive
Figure 6-21: Input/Output Buffer (IOBUF) Primitive
3-state input
from FPGA
O (Output)
3-state input
From FPGA
to FPGA
I (Input)
www.xilinx.com
I (Input)
T
device pads
Inputs from
T
IB
I
IOBUF
IBUFDS/IBUFGDS
OBUFT
+
–
ug190_6_20_022806
Figure
O
Figure 6-21
I/O
to/from device pad
Output to
FPGA
O (Output)
to device pad
ug190_6_18_022806
ug190_6_19_022806
6-20, typically implements
Virtex-5 FPGA User Guide
UG190 (v5.3) May 17, 2010
shows a generic Virtex-5