MC68030FE25C Freescale Semiconductor, MC68030FE25C Datasheet - Page 418
MC68030FE25C
Manufacturer Part Number
MC68030FE25C
Description
IC MPU 32BIT ENHANCED 132-CQFP
Manufacturer
Freescale Semiconductor
Specifications of MC68030FE25C
Processor Type
M680x0 32-Bit
Speed
25MHz
Voltage
5V
Mounting Type
Surface Mount
Package / Case
132-CQFP
Family Name
M68000
Device Core
ColdFire
Device Core Size
32b
Frequency (max)
25MHz
Instruction Set Architecture
RISC
Supply Voltage 1 (typ)
5V
Operating Supply Voltage (max)
5.25V
Operating Supply Voltage (min)
4.75V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
132
Package Type
CQUAD
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MC68030FE25C
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
MC68030FE25C
Manufacturer:
MOTOROLA/摩托罗拉
Quantity:
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MOTOROLA
10.3.4 Restore CIR
10.3.5 Operation Word CIR
10.3.6 Command CIR
10.3.7 Condition CIR
I
The main processor initiates the cpRESTORE instruction by writing a copro-
format information to the main processor through the restore CIR. The offset
from the base address of the CIR set for the restore CIR is $06. Refer to
The main processor writes the F-line operation word of the instruction in
word coprocessor response primitive (refer to 10.4.6
word CIR is $08.
The main processor initiates a general category instruction by writing the
word in the instruction stream, to the 16-bit command CIR. The offset from
the base address of the CIR set for the command CIR is $OA.
The main processor initiates a conditional category instruction by writing the
condition selector to the 16-bit condition CIR. The offset from the base address
of the CIR set for the condition CIR is $0E. Figure 10-20 shows the format of
the condition CIR.
cessor format word to the 16-bit restore register. During the execution of the
cpRESTORE instruction, the coprocessor communicates status and state frame
10.2.3.2 COPROCESSOR FORMAT WORDS.
progress to the 16-bit operation word CIR in response to a transfer operation
Primitive). The offset from the base address of the CIR set for the operation
instruction command word, which follows the instruction F-line operation
15
(UNDEFINED, RESERVED)
Figure 10-20. Condition CIR Format
MC68030 USER'S MANUAL
6
]
5
Transfer Operation Word
CONDITION S E L E C T O R
10-31
0
I
1C
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