MC68030FE25C Freescale Semiconductor, MC68030FE25C Datasheet - Page 427

• Manufacturer Part Number: MC68030FE25C
• Description: IC MPU 32BIT ENHANCED 132-CQFP
• Manufacturer: Freescale Semiconductor

Specifications of MC68030FE25C

• Processor Type: M680x0 32-Bit
• Speed: 25MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 132-CQFP
• Family Name: M68000
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 25MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 5V
• Operating Supply Voltage (max): 5.25V
• Operating Supply Voltage (min): 4.75V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 132
• Package Type: CQUAD
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Compliant

IO
10-40
10.4.5 Supervisor Check Primitive
10,4.6 Transfer Operation Word Primitive
the coprocessor instruction by writing an abort mask (refer to 10.3.2
The supervisor check primitive allows privileged instructions to be defined
for an instruction that is implemented as privileged.
The supervisor check primitive verifies that the main processor is operating
This primitive uses the PC bit as previously described. Bit [15] is shown as
one, but during execution of a general category instruction, this primitive
When the main processor reads the supervisor check primitive from the
(main processor operating at user privilege level), the main processor aborts
CIR) to the control CIR. The main processor then initiates privilege violation
exception processing (refer to 10.5.2.3 PRIVILEGE VIOLATIONS). If the main
The transfer operation word primitive requests a copy of the coprocessor
of the transfer operation word primitive.
in the supervisor state while executing a coprocessor instruction. This pri-
mitive applies to instructions in the general and conditional coprocessor
instruction categories. Figure 10-25 shows the format of the supervisor check
primitive.
I11Pcl010101
performs the same operations regardless of the value of bit [15]. If this pri-
mitive is issued with bit [15]=0 during a conditional category instruction,
however, the main processor initiates protocol violation exception process-
ing.
response CIR, it checks the value of the S bit in the status register. If S = 0
processor is at the supervisor privilege level when it receives this primitive,
it reads the response CIR again.
in the coprocessor general and conditional instruction categories. This pri-
mitive should be the first one issued by the coprocessor during the dialog
instruction operation word for the coprocessor. This primitive applies to
general and conditional category instructions. Figure 10-26 shows the format
15
14
13
Figure 10-25. Supervisor Check Primitive Format
12
11
MC68030 USER'S MANUAL
10
9
101010101010101010101
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7
6
5
4
3
MOTOROLA
2
Control
1
0