MC68LC060RC66 Freescale Semiconductor, MC68LC060RC66 Datasheet - Page 14

• Manufacturer Part Number: MC68LC060RC66
• Description: IC MPU 32BIT 66MHZ 206-PGA
• Manufacturer: Freescale Semiconductor

Specifications of MC68LC060RC66

• Processor Type: M680x0 32-Bit
• Speed: 66MHz
• Voltage: 3.3V
• Mounting Type: Surface Mount
• Package / Case: 206-PGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -

10.1.3
10.1.4
10.1.5
10.1.6
10.2
10.3
10.3.1
10.3.2
10.3.3
10.3.4
10.4
10.5
10.6
10.7
10.8
10.9
10.10
10.11
10.12
10.13
10.14
10.15
10.16
11.1
11.1.1
11.1.2
11.1.2.1
11.1.2.1.1
11.1.2.1.2
11.1.2.1.3
11.1.2.1.4
11.1.2.1.5
11.1.2.2
11.1.2.2.1
11.1.2.2.2
11.1.2.2.3
11.1.2.2.4
11.1.2.3
11.1.2.4
11.1.2.5
11.1.3
xvi
Table of Contents
Timing Assumptions ................................................................................. 10-10
Cache and ATC Performance Degradation Times ................................... 10-12
Effective Address Calculation Times ........................................................ 10-14
Move Instruction Execution Times............................................................ 10-14
Standard Instruction Execution Times ...................................................... 10-16
Immediate Instruction Execution Times.................................................... 10-17
Single-Operand Instruction Execution Times ........................................... 10-18
Shift/Rotate Execution Times ................................................................... 10-19
Bit Manipulation and Bit Field Execution Times........................................ 10-19
Branch Instruction Execution Times ......................................................... 10-21
LEA, PEA, and MOVEM Execution Times................................................ 10-22
Multiprecision Instruction Execution Times............................................... 10-22
Status Register, MOVES, and Miscellaneous
Instruction Execution Times...................................................................... 10-22
FPU Instruction Execution Times ............................................................. 10-24
Exception Processing Times .................................................................... 10-26
Guidelines for Porting Software to the MC68060 ....................................... 11-1
Dispatch Test 3: Allowable Effective Addressing Mode in the sOEP ....... 10-8
Dispatch Test 4: Allowable Operand Data Memory Reference ................ 10-8
Dispatch Test 5: No Register Conflicts on sOEP.AGU Resources .......... 10-8
Dispatch Test 6: No Register Conflicts on sOEP.IEE Resources ............ 10-9
Instruction ATC Miss .............................................................................. 10-12
Data ATC Miss ....................................................................................... 10-13
Instruction Cache Miss ........................................................................... 10-13
Data Cache Miss .................................................................................... 10-13
User Code ................................................................................................ 11-1
Supervisor Code....................................................................................... 11-1
Precise Vs. Imprecise Exception Mode .................................................... 11-6
Initialization Code (Reset Exception Handler) ........................................ 11-2
Virtual Memory Software ........................................................................ 11-3
Context Switch Interrupt Handlers.......................................................... 11-5
Trace Handlers ....................................................................................... 11-5
I/O Device Driver Software ..................................................................... 11-5
Processor Configuration Register (PCR) (MOVEC of PCR). ............... 11-2
Default Transparent Translation Register (MOVEC of TCR) ............... 11-2
MC68060 Software Package (M68060SP). ......................................... 11-2
Resource Checking (Access Error Handler) ........................................ 11-3
Translation Control Register (MOVEC of TCR).................................... 11-3
Descriptors in Cacheable Copyback Pages Prohibited........................ 11-4
Page and Descriptor Faults (Access Error Handler). ........................... 11-4
PTEST, MOVEC of MMUSR, and PLPA.............................................. 11-4
Cache Control Register (CACR) (MOVEC of CACR).......................... 11-3
Applications Information
M68060 USER’S MANUAL
Section 11
MOTOROLA