FWIXP425BD Intel, FWIXP425BD Datasheet - Page 105

• Manufacturer Part Number: FWIXP425BD
• Description: IC NETWRK PROCESSR 533MHZ 492BGA
• Manufacturer: Intel

Specifications of FWIXP425BD

• Processor Type: Network
• Features: XScale Core
• Speed: 533MHz
• Voltage: 1.3V
• Mounting Type: Surface Mount
• Package / Case: 492-BGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 852279

Datasheet
Table 62.
HPI-16 Non-Multiplexed Write Accesses Values
NOTES:
1. The address phase parameter (T1) must be set to a minimum value of 2. This value allows three T clocks for
2. The data setup phase parameter (T2) must be set to a minimum value of 2. This value allows three T clocks
3. The data strobe phase parameter (T3) must be set to a minimum value of 1. This value allows two T clocks
4. Setting the recovery phase parameter (T5) will adjust the duration between successive accesses on the
5. HRDY can be asserted by the DSP at any point in the access. The interface will not leave states T1 or T3
6. One cycle is the period of the Expansion Bus clock.
7. Timing tests were performed with a 70-pF capacitor to ground.
T
T
T
T
T
the address phase. This setting is required to ensure that in the event of an HRDY, the Intel
Line and Intel
the address phase for at least one clock pulse after the HRDY is de-active.
for setup phase.
for the data phase. This setting is required to ensure that in the event of an HRDY, the Intel
Line and Intel
the data setup phase for at least one clock pulse after the HRDY is de-active
Expansion Bus interface.
until HRDY is de-active
Symbol
cs2hds1val
hds1_pulse
data_setup
add_setup
data_hold
T
recov
Valid time that address is asserted on the line. The address
is asserted at the same time as chip select.
Delay from chip select being active and the HDS1 data
strobe being active.
Pulse width of the HDS1 data strobe
Data valid prior to the rising edge of the HDS1 data strobe.
Data valid after the rising edge of the HDS1 data strobe.
Time required between successive accesses on the
expansion interface.
®
®
IXC1100 Control Plane processors has had sufficient time to recognize the HRDY and hold
IXC1100 Control Plane processors has had sufficient time to recognize the HRDY and hold
Intel
®
IXP42X Product Line and IXC1100 Control Plane Processor
Parameter
Min.
Electrical Specifications
11
3
4
4
4
2
Max.
45
36
17
4
5
5
Cycles
Cycles
Cycles
Cycles
Cycles
Cycles
®
®
Units
IXP4XX Product
IXP4XX Product
1, 5, 6
5, 6
2, 4, 5
3, 5, 6
3, 6
4, 6
Notes
105