FWIXP425BD Intel, FWIXP425BD Datasheet - Page 41

• Manufacturer Part Number: FWIXP425BD
• Description: IC NETWRK PROCESSR 533MHZ 492BGA
• Manufacturer: Intel

Specifications of FWIXP425BD

• Processor Type: Network
• Features: XScale Core
• Speed: 533MHz
• Voltage: 1.3V
• Mounting Type: Surface Mount
• Package / Case: 492-BGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 852279

Datasheet
Table 17.
Table 18.
System Interface
Power Interface
BYPASS_CLK
SCANTESTMODE_N
RESET_IN_N
PWRON_RESET_N
HIGHZ_N
PLL_LOCK
RCOMP
†
VCC
VCCP
VSS
VCCOSCP
VSSOSCP
VCCOSC
VSSOSC
VCCPLL1
VCCPLL2
† For a legend of the
For a legend of the Type codes, see
Name
Name
Type
I
I
I
I
I
I
I
I
†
Type
Intel
Reset
Power
1.3-V power supply input pins used for the internal logic.
3.3-V power supply input pins used for the peripheral (I/O) logic.
Ground power supply input pins used for both the 3.3-V and the 1.3-V power supplies.
3.3-V power supply input pins used for the peripheral (I/O) logic of the analog
oscillator circuitry.
Require special power filtering circuitry. Refer to
Ground input pins used for the peripheral (I/O) logic of the analog oscillator circuitry.
Used in conjunction with the VCCOSCP pins.
Requires special power filtering circuitry. Refer to
1.3-V power supply input pins used for the internal logic of the analog oscillator
circuitry.
Requires special power filtering circuitry. Refer to
Ground power supply input pins used for the internal logic of the analog oscillator
circuitry. Used in conjunction with the VCCOSC pins.
Requires special power filtering circuitry. Refer to
1.3-V power supply input pins used for the internal logic of the analog phase lock-loop
circuitry.
Requires special power filtering circuitry. Refer to
1.3-V power supply input pins used for the internal logic of the analog phase lock-loop
circuitry.
Requires special power filtering circuitry. Refer to
On
H
H
Z
0
0
Z
codes, see
†
®
IXP42X Product Line and IXC1100 Control Plane Processor
Reset
Table 4 on page
VI/PE
VI/PE
VO
VI
VI
VI
Table 4 on page
†
Type
O
I
I
I
I
I
I
†
30.
Used for test purposes only.
Must be pulled high for normal operation.
Used for test purposes only.
Must be pulled high for normal operation.
Used as a reset input to the device after power up conditions have
been met. Power up conditions include the power supplies reaching
a safe stable condition and the PLL achieving a locked state and the
PWRON_RESET_N coming to an active state prior to the
RESET_IN_N coming to an active state.
Signal used at power up to reset all internal logic to a known state
after the PLL has achieved a locked state. The PWRON_RESET_N
input is a 1.3-V tolerant only.
Used for test purposes only.
Must be pulled high for normal operation.
Signal used to inform external reset logic that the internal PLL has
achieved a locked state.
Signal used to control PCI drive strength characteristics. Drive
strength is varied on PCI address, data and control signals.
Pin requires a 34-Ω +/- 1% tolerance resistor to ground. Refer to
Figure 12 on page 77
30.
Description
Functional Signal Descriptions
Figure 10 on page 76
Description
Figure 10 on page 76
Figure 11 on page 76
Figure 11 on page 76
Figure 8 on page 75
Figure 9 on page 75
41