TDA8024T/C1,118 NXP Semiconductors, TDA8024T/C1,118 Datasheet - Page 6

• Manufacturer Part Number: TDA8024T/C1,118
• Description: IC SMART CARD INTERFACE 28-SOIC
• Manufacturer: NXP Semiconductors

Specifications of TDA8024T/C1,118

• Package / Case: 28-SOIC (7.5mm Width)
• Controller Type: Smart Card Interface
• Interface: Analog
• Voltage - Supply: 2.7 V ~ 6.5 V
• Current - Supply: 1.5mA
• Operating Temperature: -25°C ~ 85°C
• Mounting Type: Surface Mount
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 25 C
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 935271342118; TDA8024TD-T; TDA8024TD-T

Philips Semiconductors
7
Note
1. The noise margin on V
2004 July 12
CLKDIV1
CLKDIV2
5V/3V
PGND
S2
V
S1
V
PRES
PRES
I/O
AUX2
AUX1
CGND
CLK
RST
V
PORADJ
CMDVCC
RSTIN
V
GND
OFF
XTAL1
XTAL2
I/OUC
AUX1UC
AUX2UC
DDP
UP
CC
DD
IC card interface
SYMBOL
PINNING
PIN
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
1
2
3
4
5
6
7
8
9
CC
TYPE
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
O
O
O
S
S
S
S
S
S
will be higher with the 220 nF capacitor.
I
I
I
I
I
I
I
I
I
CLK frequency selection input 1
CLK frequency selection input 2
card supply voltage selection input; V
DC/DC converter power supply ground
DC/DC converter capacitor; connected between pins S1 and S2; C = 100 nF with
ESR < 100 m
DC/DC converter power supply voltage
DC/DC converter capacitor; connected between pins S1 and S2; C = 100 nF with
ESR < 100 m
DC/DC converter output decoupling capacitor connection; C = 100 nF with
ESR < 100 mW must be connected between V
card presence contact input (active LOW); if PRES or PRES is active, the card is
considered ‘present’ and a built-in debounce feature of 8 ms (typ.) is activated
card presence contact input (active HIGH); if PRES or PRES is active, the card is
considered ‘present’ and a built-in debounce feature of 8 ms (typ.) is activated
data line to/from card reader contact C7; integrated 11 k pull-up resistor to V
data line to/from card reader contact C8; integrated 11 k pull-up resistor to V
data line to/from card reader contact C4; integrated 11 k pull-up resistor to V
card signal ground
card clock to/from card reader contact C3
card reset output from card reader contact C2
card supply voltage to card reader contact C1; decoupled to CGND via 2
or 100 + 220 nF capacitors with ESR < 100 m ; note 1
Power-on reset threshold adjustment input for changing the reset threshold with
an external resistor bridge; doubles the width of the POR pulse when used; this
pin is not connected for the TDA8024AT
input from the host to start activation sequence (active LOW)
card reset input from the host
supply voltage
ground
NMOS interrupt output to the host (active LOW); 20 k integrated pull-up resistor
to V
crystal connection or input for external clock
crystal connection (leave open-circuit if external clock source is used)
host data I/O line; integrated 11 k pull-up resistor to V
auxiliary data line to/from the host; integrated 11 k pull-up resistor to V
auxiliary data line to/from the host; integrated 11 k pull-up resistor to V
DD
6
DESCRIPTION
CC
= 5 V (HIGH) or V
UP
and PGND
DD
CC
Product specification
= 3 V (LOW)
TDA8024
DD
DD
100 nF
CC
CC
CC