DSPIC33FJ128MC506-I/PT Microchip Technology Inc., DSPIC33FJ128MC506-I/PT Datasheet - Page 113

• Manufacturer Part Number: DSPIC33FJ128MC506-I/PT
• Description: DSP, 16-Bit, 128KB Flash, 8KB RAM, 53 I/O, TQFP-64
• Manufacturer: Microchip Technology Inc.
• Type: DSPr

Specifications of DSPIC33FJ128MC506-I/PT

• A/d Inputs: 16-Channels, 12-Bit
• Comparators: 8
• Cpu Speed: 40 MIPS
• Eeprom Memory: 0 Bytes
• Input Output: 53
• Interface: CAN, I2C, SPI, UART/USART
• Ios: 53
• Memory Type: Flash
• Number Of Bits: 16
• Package Type: 64-pin TQFP
• Programmable Memory: 128K Bytes
• Ram Size: 8K Bytes
• Timers: 9-16-bit, 4-32-bit
• Voltage, Range: 3-3.6
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

REGISTER 6-13:
© 2007 Microchip Technology Inc.
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15
bit 14
bit 13
bit 12
bit 11
bit 10
bit 9
bit 8
bit 7
bit 6
bit 5
bit 4
bit 3
C2RXIE
FLTAIE
R/W-0
R/W-0
FLTAIE: PWM Fault A Interrupt Enable bit
1 = Interrupt request has occurred
0 = Interrupt request has not occurred
Unimplemented: Read as ‘0’
DMA5IE: DMA Channel 5 Data Transfer Complete Interrupt Enable bit
1 = Interrupt request has occurred
0 = Interrupt request has not occurred
DCIIE: DCI Event Interrupt Enable bit
1 = Interrupt request has occurred
0 = Interrupt request has not occurred
DCIEIE: DCI Error Interrupt Enable bit
1 = Interrupt request has occurred
0 = Interrupt request has not occurred
QEIIE: QEI Event Interrupt Enable bit
1 = Interrupt request has occurred
0 = Interrupt request has not occurred
PWMIE: PWM Error Interrupt Enable bit
1 = Interrupt request has occurred
0 = Interrupt request has not occurred
C2IE: ECAN2 Event Interrupt Enable bit
1 = Interrupt request has occurred
0 = Interrupt request has not occurred
C2RXIE: ECAN2 Receive Data Ready Interrupt Enable bit
1 = Interrupt request has occurred
0 = Interrupt request has not occurred
INT4IE: External Interrupt 4 Enable bit
1 = Interrupt request has occurred
0 = Interrupt request has not occurred
INT3IE: External Interrupt 3 Enable bit
1 = Interrupt request has occurred
0 = Interrupt request has not occurred
T9IE: Timer9 Interrupt Enable bit
1 = Interrupt request has occurred
0 = Interrupt request has not occurred
T8IE: Timer8 Interrupt Enable bit
1 = Interrupt request has occurred
0 = Interrupt request has not occurred
INT4IE
R/W-0
U-0
—
IEC3: INTERRUPT ENABLE CONTROL REGISTER 3
W = Writable bit
‘1’ = Bit is set
DMA5IE
INT3IE
R/W-0
R/W-0
R/W-0
R/W-0
DCIIE
T9IE
Preliminary
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
DCIEIE
R/W-0
R/W-0
T8IE
MI2C2IE
R/W-0
R/W-0
QEIIE
x = Bit is unknown
SI2C2IE
PWMIE
dsPIC33F
R/W-0
R/W-0
DS70165E-page 111
R/W-0
R/W-0
C2IE
T7IE
bit 8
bit 0