WJLXT972ALC.A4 Intel, WJLXT972ALC.A4 Datasheet - Page 3

• Manufacturer Part Number: WJLXT972ALC.A4
• Description: IC TRANS 3.3V ETHERNET 64-LQFP
• Manufacturer: Intel
• Type: Transceiverr

Specifications of WJLXT972ALC.A4

• Number Of Drivers/receivers: 1/1
• Protocol: IEEE 802
• Voltage - Supply: 3.14 V ~ 3.45 V
• Mounting Type: Surface Mount
• Package / Case: 64-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 857341

LXT972M PHY
Datasheet
302875, Revision 5.3
31 October 2007
Contents
1.0
2.0
3.0
4.0
5.0
Cortina Systems
Introduction to This Document ..................................................................................................10
1.1
1.2
Block Diagram .............................................................................................................................11
Ball and Pin Assignments ..........................................................................................................12
Signal Descriptions .....................................................................................................................16
Functional Description................................................................................................................21
5.1
5.2
5.3
5.4
5.5
5.6
5.7
5.8
Document Overview ........................................................................................................... 10
Related Documents ............................................................................................................10
Device Overview .................................................................................................................21
5.1.1
5.1.2
Network Media / Protocol Support ......................................................................................22
5.2.1
5.2.2
5.2.3
Operating Requirements.....................................................................................................25
5.3.1
5.3.2
Initialization .........................................................................................................................25
5.4.1
5.4.2
5.4.3
5.4.4
Establishing Link .................................................................................................................28
5.5.1
5.5.2
MII Operation ......................................................................................................................30
5.6.1
5.6.2
5.6.3
5.6.4
5.6.5
5.6.6
5.6.7
100 Mbps Operation ........................................................................................................... 35
5.7.1
5.7.2
5.7.3
10 Mbps Operation .............................................................................................................42
5.8.1
5.8.2
5.8.3
5.8.4
5.8.5
5.8.6
5.8.7
®
LXT972M Single-Port 10/100 Mbps PHY Transceiver
Comprehensive Functionality ................................................................................21
Optimal Signal Processing Architecture.................................................................21
10/100 Network Interface.......................................................................................22
MII Data Interface ..................................................................................................23
Configuration Management Interface ....................................................................23
Power Requirements .............................................................................................25
Clock Requirements ..............................................................................................25
MDIO Control Mode and Hardware Control Mode.................................................27
Reduced-Power Modes .........................................................................................27
Reset .....................................................................................................................27
Hardware Configuration Settings ...........................................................................28
Auto-Negotiation ....................................................................................................29
Parallel Detection...................................................................................................30
MII Clocks ..............................................................................................................31
Transmit Enable.....................................................................................................32
Receive Data Valid ................................................................................................32
Carrier Sense.........................................................................................................33
Error Signals ..........................................................................................................33
Collision ................................................................................................................. 33
Loopback ...............................................................................................................33
100BASE-X Network Operations ...........................................................................35
Collision Indication .................................................................................................37
100BASE-X Protocol Sublayer Operations............................................................38
10BASE-T Preamble Handling ..............................................................................42
10BASE-T Carrier Sense.......................................................................................42
10BASE-T Dribble Bits ..........................................................................................42
10BASE-T Link Integrity Test ................................................................................42
Link Failure ............................................................................................................43
10BASE-T SQE (Heartbeat) ..................................................................................43
10BASE-T Jabber ..................................................................................................43
Contents
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