LPC1833FET256,551 NXP Semiconductors, LPC1833FET256,551 Datasheet - Page 73

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LPC1833FET256,551

Manufacturer Part Number
LPC1833FET256,551
Description
Microcontrollers (MCU) 32BIT ARM CORTEX-M3 MCU 136KB SRAM
Manufacturer
NXP Semiconductors
Series
LPC18xxr

Specifications of LPC1833FET256,551

Core
ARM Cortex M3
Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
150MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, Microwire, SD/MMC, SPI, SSI, SSP, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
Number Of I /o
80
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Eeprom Size
-
Ram Size
136K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 16x10b; D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
256-LBGA
Lead Free Status / Rohs Status
 Details
Other names
935293791551
NXP Semiconductors
12. ADC/DAC electrical characteristics
Table 17.
V
[1]
[2]
[3]
[4]
[5]
[6]
[7]
[8]
[9]
LPC1850_30_20_10
Objective data sheet
Symbol
V
C
E
E
E
E
E
R
R
f
f
clk(ADC)
c(ADC)
DDA(3V3)
IA
D
L(adj)
O
G
T
ia
vsi
i
Conditions: V
The ADC is monotonic, there are no missing codes.
The differential linearity error (E
The integral non-linearity (E
appropriate adjustment of gain and offset errors. See
The offset error (E
ideal curve. See
The gain error (E
error, and the straight line which fits the ideal transfer curve. See
The absolute error (E
ADC and the ideal transfer curve. See
T
Input resistance R
amb
= 25 C; maximum sampling frequency f
over specified ranges; T
ADC characteristics
Parameter
analog input voltage
analog input capacitance
differential linearity error
integral non-linearity
offset error
gain error
absolute error
voltage source interface
resistance
input resistance
ADC clock frequency
ADC conversion frequency
SSA
Figure
G
= 0 V, V
i
O
) is the relative difference in percent between the straight line fitting the actual transfer curve after removing offset
depends on the sampling frequency fs: R
) is the absolute difference between the straight line which fits the actual curve and the straight line which fits the
T
) is the maximum difference between the center of the steps of the actual transfer curve of the non-calibrated
24.
DDA(3V3)
L(adj)
D
) is the peak difference between the center of the steps of the actual and the ideal transfer curve after
) is the difference between the actual step width and the ideal step width. See
amb
= 3.3 V.
=
Figure
40
All information provided in this document is subject to legal disclaimers.
Conditions
s
C to +85
24.
= 4.5 MHz and analog input capacitance C
Rev. 1.2 — 17 February 2011
Figure
C; ADC frequency 4.5 MHz; unless otherwise specified.
i
24.
= 1 / (f
Figure
[1][2][3]
s
[1][4]
[1][5]
[1][6]
[1][7]
[8][9]
 C
24.
ia
Min
0
-
-
-
-
-
-
-
-
-
-
).
32-bit ARM Cortex-M3 microcontroller
LPC1850/30/20/10
-
Typ
-
-
-
-
-
-
-
-
-
-
ia
= 1 pF.
Max
V
<tbd>
<tbd>
<tbd>
<tbd>
<tbd>
<tbd>
<tbd>
<tbd>
<tbd>
<tbd>
DDA(3V3)
Figure
© NXP B.V. 2011. All rights reserved.
Unit
V
pF
LSB
LSB
LSB
%
LSB
k
M
MHz
kSamples/s
24.
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