PCA9541D/03,118 NXP Semiconductors, PCA9541D/03,118 Datasheet - Page 15

• Manufacturer Part Number: PCA9541D/03,118
• Description: IC I2C 2:1 SELECTOR 16-SOIC
• Manufacturer: NXP Semiconductors

Specifications of PCA9541D/03,118

• Applications: 2-Channel I²C Multiplexer
• Interface: I²C, SMBus
• Voltage - Supply: 2.3 V ~ 5.5 V
• Package / Case: 16-SOIC (3.9mm Width)
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 568-1851-2; 935273317118; PCA9541D/03-T

NXP Semiconductors
PCA9541_7
Product data sheet
8.4.1 Bus control lost interrupt
8.4.2 Recovery/initialization interrupt
8.4 Interrupt Status registers
The PCA9541 provides 4 different types of interrupt:
When an upstream master takes control of the I
the downstream channel, an interrupt is generated to the master losing control of the bus
(INT line goes LOW to let the master know that it lost the control of the bus) immediately
after disconnection from the downstream channel.
By setting the BUSLOSTMSK bit to ‘1’, the interrupt is masked and the upstream master
that lost the I
Before switching to a new upstream channel, an automatic bus recovery/initialization can
be performed by the PCA9541. This function is requested by setting the BUSINIT bit to ‘1’.
When the downstream bus has been initialized, an interrupt to the new master is
generated (INT line goes LOW).
By setting the BUSINITMSK bit to ‘1’, the interrupt is masked and the new master does
not receive an interrupt (INT line does not go LOW).
When the automatic bus recovery/initialization is not requested, if the built-in bus sensor
function (sensing permanently the downstream I
condition (previous bus channel connected to the downstream slave channel, was
between a START and STOP condition), then an interrupt to the new master is sent (INT
line goes LOW). This interrupt tells the new master that an external bus
recovery/initialization must be performed. By setting the BUSOKMSK bit to ‘1’, the
interrupt is masked and the new master does not receive an interrupt (INT line does not
go LOW).
Remark: In this particular situation, after the switch to the new master is performed,
a read of the Interrupt Status Register is not possible if the switch happened in the
middle of a read sequence because the new master does not have control of the SDA
line.
•
•
•
•
To indicate to the former I
To indicate to the new I
– The bus recovery/initialization has been performed and that the downstream
– A ‘bus not well initialized’ condition has been detected by the PCA9541 when the
Indicate to both I
generated through the INT_IN pin.
Functionality wiring test.
channel connection has been done (built-in bus recovery/initialization active).
switch has been done (built-in bus recovery/initialization not active). This
information can be used by the new master to initiate its own bus
recovery/initialization sequence.
2
C-bus control does not receive an interrupt (INT line does not go LOW).
2
C-bus upstream masters that a downstream interrupt has been
Rev. 07 — 2 July 2009
2-to-1 I
2
C-bus master that:
2
C-bus master that it is not in control of the bus anymore
2
C-bus master selector with interrupt logic and reset
2
2
C-bus while the other channel was using
C-bus traffic) detects a non-idle
PCA9541
© NXP B.V. 2009. All rights reserved.
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