PCA9541D/03,118 NXP Semiconductors, PCA9541D/03,118 Datasheet - Page 18

• Manufacturer Part Number: PCA9541D/03,118
• Description: IC I2C 2:1 SELECTOR 16-SOIC
• Manufacturer: NXP Semiconductors

Specifications of PCA9541D/03,118

• Applications: 2-Channel I²C Multiplexer
• Interface: I²C, SMBus
• Voltage - Supply: 2.3 V ~ 5.5 V
• Package / Case: 16-SOIC (3.9mm Width)
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 568-1851-2; 935273317118; PCA9541D/03-T

NXP Semiconductors
PCA9541_7
Product data sheet
8.6 External reset
8.7 Voltage translation
A reset can be accomplished by holding the RESET pin LOW for a minimum of t
PCA9541 registers and I
RESET input is once again HIGH. This input typically requires a pull-up resistor to V
Default states are:
The pass gate transistors of the PCA9541 are constructed such that the V
be used to limit the maximum voltage that will be passed from one I
Figure 8
was generated using the data specified in
sheet). In order for the PCA9541 to act as a voltage translator, the V
be equal to, or lower than the lowest bus voltage. For example, if the main buses were
running at 5 V, and the downstream bus was 3.3 V, then V
3.3 V to effectively clamp the downstream bus voltages. Looking at
V
PCA9541 supply voltage could be set to 3.3 V. Pull-up resistors can then be used to bring
the bus voltages to their appropriate levels (see
More Information on voltage translation can be found in Application Note AN262:
PCA954X family of I
Fig 8.
•
•
o(sw)(max)
I
PCA9541/01
no I
PCA9541/03.
2
C-bus upstream Channel 0 connected to the I
(1) maximum
(2) typical
(3) minimum
2
C-bus upstream channel connected to the I
shows the voltage characteristics of the pass gate transistors (note that the graph
Pass gate voltage as a function of supply voltage
will be at 3.3 V when the PCA9541 supply voltage is 3.5 V or lower so the
2
V
C/SMBus multiplexers and switches .
o(sw)
(V)
5.0
4.0
3.0
2.0
1.0
Rev. 07 — 2 July 2009
2
2.0
2-to-1 I
C-bus state machine will be held in their default states until the
2.5
2
C-bus master selector with interrupt logic and reset
3.0
3.5
Section 12 “Static characteristics”
4.0
Figure
(1)
(2)
(3)
2
4.5
2
C-bus downstream channel for the
C-bus downstream channel for the
17).
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5.0
o(sw)
V
DD
(V)
5.5
should be equal to or below
Figure
2
o(sw)
C-bus to another.
PCA9541
© NXP B.V. 2009. All rights reserved.
voltage should
DD
8, we see that
of this data
voltage can
w(rst)L
18 of 41
. The
DD
.