PCA9518AD,118 NXP Semiconductors, PCA9518AD,118 Datasheet - Page 8

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PCA9518AD,118

Manufacturer Part Number
PCA9518AD,118
Description
IC I2C BUS HUB 5-CH 20SOIC
Manufacturer
NXP Semiconductors
Datasheet

Specifications of PCA9518AD,118

Package / Case
20-SOIC (7.5mm Width)
Applications
CMOS Bus Controller
Interface
I²C
Voltage - Supply
3 V ~ 3.6 V
Mounting Type
Surface Mount
Logic Family
PCA9518A
Operating Supply Voltage
2.3 V to 3.6 V
Power Dissipation
300 mW
Operating Temperature Range
- 40 C to + 85 C
Input Voltage
5 V
Logic Type
I2C Bus
Maximum Clock Frequency
400 KHz
Mounting Style
SMD/SMT
Output Voltage
5 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
935284253118
PCA9518AD-T
PCA9518AD-T
NXP Semiconductors
PCA9518A_3
Product data sheet
the acknowledge and then returns to the PCA9518A level creating a foot before it
completes the LOW-to-HIGH transition. SDA lines other than the one with the master and
the one with the slave have a uniform LOW level driven by the PCA9518A repeater.
The other four waveforms are the expansion bus signals and are included primarily for
timing reference points. All timing on the expansion bus is with respect to 0.5V
EXPSDA1 is the expansion bus that is driven LOW whenever any SDA pin falls below
0.3V
EXPSCL1 is the expansion bus that is driven LOW whenever any SCL pin falls below
0.3V
below 0.4 V by an external driver starts to rise. The last SDA to rise above 0.4 V is held
down by the PCA9518A to ~0.5 V until after the delay of the circuit which determines that
it was the last to rise, then it is allowed to rise above the ~0.5 V level driven by the
PCA9518A. Considering the bus 0 SDA to be the last one to go above 0.4 V, then the
EXPSDA1 returns to HIGH after the EXPSDA2 is HIGH and either the bus 0 SDA rise time
is 1 s or, when the bus 0 SDA reaches 0.7V
EXPSDA2 and EXPSDA1 are HIGH the rest of the SDA lines are allowed to rise. The
same description applies for the EXPSCL1, EXPSCL2, and SCL pins.
0.4 V. The EXPSDA2 returns HIGH after the SDA pin that was the last one being held
DD
DD
. EXPSDA2 is the expansion bus that is driven LOW whenever any pin is 0.4 V.
. EXPSCL2 is the expansion bus that is driven LOW whenever any SCL pin is
Rev. 03 — 3 December 2008
DD
, whichever occurs first. After both
Expandable 5-channel I
PCA9518A
© NXP B.V. 2008. All rights reserved.
2
DD
C-bus hub
.
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