AN983BX-BG-T-V1 Infineon Technologies, AN983BX-BG-T-V1 Datasheet - Page 38

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AN983BX-BG-T-V1

Manufacturer Part Number
AN983BX-BG-T-V1
Description
IC PCI TO ETHERNET LAN 128-PQFP
Manufacturer
Infineon Technologies
Datasheet

Specifications of AN983BX-BG-T-V1

Applications
Ethernet Controller
Interface
USB
Voltage - Supply
3 V ~ 3.6 V
Package / Case
128-BFQFP
Mounting Type
Surface Mount
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
AN983BXBGTV1
AN983BXBGTV1XP
SP000075554

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Part Number
Manufacturer
Quantity
Price
Part Number:
AN983BX-BG-T-V1
Manufacturer:
Infineon Technologies
Quantity:
10 000
Part Number:
AN983BX-BG-T-V1
Manufacturer:
INFINEON/英飞凌
Quantity:
20 000
9.1
Table 7
Module
xxxxx
Table 8
Register Short Name
LID_CR0
CSD_CR1
CC_CR2
LT_CR3
IOBA_CR4
MBA_CR5
CIS_CR10
SID_CR11
BRBA_CR12
CP_CR13
CI_CR15
DS_CR16
SIG_CR32
PMR0_CR48
PMR1_CR49
The register is addressed wordwise.
Table 9
Access Condition Short Name
Standard abbreviations:
Table 10
Mode
read/write
read
write
read/write
hardware
affected
Data Sheet
AN983B/BX Configuration Registers
Registers Address Space
Registers Overview
Registers Access ConditionsRegisters Access Conditions
Registers Access Types
Symbol Description Hardware (HW)
rw
r
w
rwh
rwv
Base Address
1200 0000
Register Long Name
Loaded Identification Number
Configuration Command and Status
Class Code and Revision Number
Latency Timer
I/O Base Address
Memory Base Address
Card Information Structure
Subsystem ID and Vendor ID
Boot ROM Base Address
Capabilities Pointer
Configuration Interrupt
Driver Space for Special Purpose
Signature
Power Management Register 0
Power Management Register 1
Register is used as input for the HW
Register is written by HW (register
between input and output -> one cycle
delay)
Register can be modified by HW
Registers and Descriptors DescriptionAN983B/BX Configuration Registers
H
Dependency
=
B
.
End Address
xxxx 0110
38
H
Description Software (SW)
Register is read and writable by SW
Value written by software is ignored by
hardware; that is, software may write any
value to this field without affecting hardware
behavior (= Target for development.)
Register is writable by SW
Register can be modified by HW, but the
priority SW versus HW has to be specified
Note
Xxxxx
Offset Address
00
04
08
0C
10
14
28
2C
30
34
3C
40
80
C0
C4
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
Rev. 1.81, 2005-12-15
Page Number
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AN983B/BX

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