MT48LC16M8A2TG-75 Micron Technology Inc, MT48LC16M8A2TG-75 Datasheet - Page 59

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MT48LC16M8A2TG-75

Manufacturer Part Number
MT48LC16M8A2TG-75
Description
Manufacturer
Micron Technology Inc
Type
SDRAMr
Datasheet

Specifications of MT48LC16M8A2TG-75

Organization
16Mx8
Density
128Mb
Address Bus
14b
Access Time (max)
6/5.4ns
Maximum Clock Rate
133MHz
Operating Supply Voltage (typ)
3.3V
Package Type
TSOP-II
Operating Temp Range
0C to 70C
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
3V
Supply Current
150mA
Pin Count
54
Mounting
Surface Mount
Operating Temperature Classification
Commercial
Lead Free Status / Rohs Status
Not Compliant

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Figure 43:
PDF: 09005aef8091e66d/Source: 09005aef8091e625
128MSDRAM_2.fm - Rev. N 1/09 EN
DQML, DQMH
A0–A9, A11
COMMAND
BA0, BA1
DQM /
CKE
A10
CLK
DQ
t CKS
t CMS
t AS
t AS
t AS
READ – With Auto Precharge
ACTIVE
T0
ROW
ROW
BANK
t CMH
t CKH
t AH
t AH
t AH
Notes:
t RCD
t RAS
t RC
t CK
T1
1. For this example, BL = 4, and CL = 2.
2. x16: A9 and A11 = “Don’t Care.”
NOP
x8: A11 = “Don’t Care.”
ENABLE AUTO PRECHARGE
t CMS
t CL
COLUMN m 2
T2
BANK
READ
t CMH
t CH
CAS Latency
T3
NOP
t LZ
t AC
59
T4
NOP
D
OUT
t OH
t AC
m
Micron Technology, Inc., reserves the right to change products or specifications without notice.
D
T5
OUT
NOP
m + 1
t OH
t AC
D
T6
OUT
128Mb: x4, x8, x16 SDRAM
NOP
m + 2
t OH
t AC
t RP
©1999 Micron Technology, Inc. All rights reserved.
D
T7
OUT
NOP
Timing Diagrams
m + 3
t OH
t HZ
T8
ROW
BANK
ACTIVE
ROW
DON’T CARE
UNDEFINED

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