MC68EC040RC25 Freescale Semiconductor, MC68EC040RC25 Datasheet - Page 177

• Manufacturer Part Number: MC68EC040RC25
• Manufacturer: Freescale Semiconductor

Specifications of MC68EC040RC25

• Family Name: M68000
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 25MHz
• Instruction Set Architecture: RISC
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Through Hole
• Pin Count: 179
• Package Type: PGA
• Lead Free Status / Rohs Status: Supplier Unconfirmed

7.5.2 Breakpoint Interrupt Acknowledge Bus Cycle
The execution of a breakpoint instruction (BKPT) generates the breakpoint interrupt
acknowledge bus cycle. An acknowledged access is indicated with TT1 and TT0 = $3,
address A31–A0 = $00000000, and TM2–TM0 = $0. When the external device terminates
the cycle with either TA or TEA, the processor takes an illegal instruction exception.
Figures 7-24 and 7-25 illustrate a flowchart and functional timing diagram for a breakpoint
interrupt acknowledge transfer.
MOTOROLA
Figure 7-24. Breakpoint Interrupt Acknowledge Bus Cycle Flowchart
10) ASSERT TIP
1) SET R/W TO READ
2) DRIVE A31–A0 TO $00000000
3) DRIVE UPA1, UPA0 TO $0
4) SET SIZE TO BYTE
5) SET TRANSFER TYPE ON TT1, TT0 TO $3
6) SET TRANSFER MODIFIER TM2–TM0 TO $0
8) NEGATE CIOUT
9) ASSERT TS FOR ONE CLOCK
INSTRUCTION EXCEPTION PROCESSING
BREAKPOINT ACKNOWLEDGE
INITIATE ILLEGAL
PROCESSOR
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M68040 USER’S MANUAL
1) NEGATE TA OR TEA
ASSERT TA OR TEA
EXTERNAL DEVICE
TERMINATE CYCLE
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