MC68EC040RC25 Freescale Semiconductor, MC68EC040RC25 Datasheet - Page 363

• Manufacturer Part Number: MC68EC040RC25
• Manufacturer: Freescale Semiconductor

Specifications of MC68EC040RC25

• Family Name: M68000
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 25MHz
• Instruction Set Architecture: RISC
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Through Hole
• Pin Count: 179
• Package Type: PGA
• Lead Free Status / Rohs Status: Supplier Unconfirmed

With the exception of the floating-point unit (FPU) and its registers, the MC68LC040 pro-
gramming model, data formats and types, instruction set (except all instructions beginning
with an “F”), caches, and MMUs are the same as those described in Section 1 Introduction
for the MC68040. Figures A-2 and A-3 illustrate the programming model and functional sig-
nal groups for the MC68LC040.
® UNIX is a registered trademark of AT&T Bell Laboratories.
MOTOROLA
• 4-Gbyte Direct Addressing Range
• Software Support Including Optimizing C Compiler and UNIX
31
31
REGISTERS
REGISTERS
ADDRESS
DATA
Figure A-2. MC68LC040 Programming Model
Freescale Semiconductor, Inc.
For More Information On This Product,
USER PROGRAMMING MODEL
(CCR)
SUPERVISOR PROGRAMMING MODEL
0
0
D0
D1
D2
D3
D4
D5
D6
D7
A0
A1
A2
A3
A4
A5
A6
A7/USP
PC
CCR
A7’/ISP
A7”/MSP
SR
VBR
SFC
DFC
CACR
URP
SRP
TC
DTT0
DTT1
ITT0
ITT1
MMUSR
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M68040 USER’S MANUAL
USER STACK POINTER
PROGRAM COUNTER
CONDITIONAL CODE REGISTER
INTERRUPT STACK POINTER
MASTER STACK POINTER
STATUS REGISTER
VECTOR BASE REGISTER
SOURCE FUNCTION CODE
DESTINATION FUNCTION CODE
CACHE CONTROL REGISTER
USER ROOT POINTER REGISTER
SUPERVISOR ROOT POINTER REGISTER
TRANSLATION CONTROL REGISTER
DATA TRANSPARENT TRANSLATION REGISTER 0
DATA TRANSPARENT TRANSLATION REGISTER 1
INSTRUCTION TRANSPARENT TRANSLATION REGISTER 0
INSTRUCTION TRANSPARENT TRANSLATION REGISTER 1
MMU STATUS REGISTER
MC68LC040
®
System V Port
REV2.3 (01/29/2000)
A-3