MC68EC040RC25 Freescale Semiconductor, MC68EC040RC25 Datasheet - Page 234

• Manufacturer Part Number: MC68EC040RC25
• Manufacturer: Freescale Semiconductor

Specifications of MC68EC040RC25

• Family Name: M68000
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 25MHz
• Instruction Set Architecture: RISC
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Through Hole
• Pin Count: 179
• Package Type: PGA
• Lead Free Status / Rohs Status: Supplier Unconfirmed

8.4.1 Four-Word Stack Frame (Format $0)
If a four-word stack frame is on the active stack and an RTE instruction is encountered,
the processor updates the SR and PC with the data read from the stack, increments the
stack pointer by eight, and resumes normal instruction execution.
8.4.2 Four-Word Throwaway Stack Frame (Format $1)
If a four-word throwaway stack frame is on the active stack and an RTE instruction is
encountered, the processor increments the active stack pointer by eight, updates the SR
with the value read from the stack, and then begins RTE processing again, as illustrated in
Figure 8-6. The processor reads a new format word from the stack frame on top of the
active stack (which may or may not be the same stack used for the previous operation)
and performs the proper operations corresponding to that format. In most cases, the
throwaway frame is on the interrupt stack, and when the SR value is read from the stack,
the S-bit and M-bit are set. In that case, there is a normal four-word frame on the master
stack. However, the second frame can be any format (even another throwaway frame)
and can reside on any of the three system stacks.
MOTOROLA
SP
SP
+$02
+$06
+$02
+$06
THROWAWAY FOUR-WORD STACK FRAME–FORMAT $1
15
15
FOUR-WORD STACK FRAME–FORMAT $0
0 0 0 0
0 0 0 1
Stack Frames
Stack Frames
PROGRAM COUNTER
PROGRAM COUNTER
STATUS REGISTER
STATUS REGISTER
VECTOR OFFSET
VECTOR OFFSET
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M68040 USER’S MANUAL
0
0
• Interrupt
• Format Error
• TRAP #N
• Illegal Instruction
• A-Line Instruction
• F-Line Instruction
• Privilege Violation
• Floating-Point Pre-
• Created on interrupt stack
Instruction
during interrupt exception
processing when transition
from master state to
interrupt state occurs.
Exception Types
Exception Types
• Next Instruction
• RTE or RESTORE
• Next Instruction
• Illegal Instruction
• A-Line Instruction
• F-Line Instruction
• First Word of Instruction
• Floating-Point Pre-
• Next Instruction: same as
Instruction
Causing Privilege Violation
Instruction Exception
on master stack.
Stacked PC Points To
Stacked PC Points To
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