M30626FHPGP Renesas Electronics America, M30626FHPGP Datasheet - Page 34
M30626FHPGP
Manufacturer Part Number
M30626FHPGP
Description
Manufacturer
Renesas Electronics America
Datasheet
1.M30626FHPGP.pdf
(103 pages)
Specifications of M30626FHPGP
Cpu Family
M16C
Device Core Size
16/32Bit
Frequency (max)
24MHz
Interface Type
I2C/IEBus/UART
Program Memory Type
Flash
Program Memory Size
384KB
Total Internal Ram Size
31KB
# I/os (max)
87
Number Of Timers - General Purpose
11
Operating Supply Voltage (typ)
5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
3.3V
On-chip Adc
26-chx10-bit
On-chip Dac
2-chx8-bit
Instruction Set Architecture
CISC
Operating Temp Range
-20C to 85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
100
Package Type
LQFP
Lead Free Status / Rohs Status
Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
M30626FHPGP
Manufacturer:
RENESAS
Quantity:
24
Part Number:
M30626FHPGP
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
Company:
Part Number:
M30626FHPGP#U3C
Manufacturer:
Renesas
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300
Company:
Part Number:
M30626FHPGP#U3C
Manufacturer:
Renesas
Quantity:
834
Company:
Part Number:
M30626FHPGP#U3C
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Part Number:
M30626FHPGP#U5
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
Company:
Part Number:
M30626FHPGP#U5C
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Part Number:
M30626FHPGP#U5C
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
Company:
Part Number:
M30626FHPGP#U7C
Manufacturer:
Renesas Electronics America
Quantity:
10 000
M16C/62P Group (M16C/62P, M16C/62PT)
Rev.2.41
REJ03B0001-0241
2.8.8
2.8.9
2.8.10
ISP is selected when the U flag is “0”; USP is selected when the U flag is “1”.
The U flag is cleared to “0” when a hardware interrupt request is accepted or an INT instruction for software
interrupt Nos. 0 to 31 is executed.
IPL is configured with three bits, for specification of up to eight processor interrupt priority levels from level 0
to level 7.
If a requested interrupt has priority greater than IPL, the interrupt is enabled.
When write to this bit, write “0”. When read, its content is indeterminate.
Jan 10, 2006
Stack Pointer Select Flag (U Flag)
Processor Interrupt Priority Level (IPL)
Reserved Area
Page 32 of 96
2. Central Processing Unit (CPU)