NCP1910GEVB ON Semiconductor, NCP1910GEVB Datasheet - Page 8

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NCP1910GEVB

Manufacturer Part Number
NCP1910GEVB
Description
BOARD EVAL NCP1910DEMO-B-TLS
Manufacturer
ON Semiconductor
Series
-r
Datasheet

Specifications of NCP1910GEVB

Design Resources
NCP1910 Schematic NCP1910GEVB BOM
Main Purpose
DC/DC, Step Down
Outputs And Type
1, Non-Isolated
Power - Output
-
Voltage - Output
Adj down to 0.8V
Current - Output
3A
Voltage - Input
3 ~ 5.5 V
Regulator Topology
Buck
Frequency - Switching
1MHz
Board Type
Fully Populated
Utilized Ic / Part
NCP1910
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
NCP1910GEVBOS
ELECTRICAL CHARACTERISTICS
= 12 V unless otherwise noted)
COMMON TO BOTH CONTROLLERS
NOTE:
POWER FACTOR CORRECTION
3. In normal operation, when the power supply is un−plugged, the bulk voltage goes down. At a first crossed level, the PG pin opens. Later,
4. Guaranteed by design.
SUPPLY SECTION
REFERENCE VOLTAGE
DELAY
PROTECTIONS
GATE DRIVE SECTION
V
V
TSDhyste
when the bulk crosses a second level, the LLC turns off. There is no timing link between these events, except the bulk capacitor discharge
slope. However, if for an unknown reason the PFC is disabled (fault, short−circuit), the PG pin immediately opens and if sufficient voltage
is still present on the bulk (e.g. in high line condition), the LLC will be disabled after a typical time of 5 ms.
Symbol
refLoadReg
V
refLineReg
R
V
V
I
I
R
t
t
t
R
ref−out
PGadjH
Pull−up
I
I
I
I
ref−out
ref−out
PGadj
TSD
DEL1
DEL2
on/off
V
V
V
V
I
CC4
CC5
CC6
CC7
POH
t
t
PG
POL
Pr
PG
Pf
on
off
op
Maximum capacitance directly connected to V
IC consumption, both PFC and LLC loaded in no load conditions
(PFC is 65 kHz and R
IC consumption, both PFC and LLC loaded 1 nF load conditions
(PFC is 65 kHz and R
IC consumption in fault mode from V
V
IC consumption in OFF mode from V
Reference voltage for external threshold setting @ I
Reference voltage for external threshold setting @ I
25°C
Vcc rejection capability, I
Reference variation with load changes, 1 mA < I
25°C
Maximum output current capability
Turn−on LLC delay after PFC OK signal is asserted
Turn−off LLC after power good pin goes low (Note 3)
on/off pin pull−up resistor
Propagation delay from on to off (ML & MU are off) (Note 4)
Low level input voltage on on/off pin (NCP1910 is enabled)
High level input voltage on on/off pin (NCP1910 is disabled)
Open voltage on on/off pin
Maximum Power good pin sink current capability
Power good saturation voltage for I
Input bias current, PGadj pin
PG comparator hysteresis
Temperature shutdown (Note 4)
Temperature Hysteresis Shutdown
Source Resistance @ I
Sink Resistance @ I
Gate Drive Voltage Rise Time from 1.5 V to 10.5 V (C
Gate Drive Voltage Fall Time from 10.5 V to 1.5 V (C
boot(min)
)
DRV
t
t
= 70 kW (LLC is 25 kHz))
= 70 kW (LLC is 25 kHz))
DRV
(For typical values T
out
= 100 mA
= −100 mA
= 5 mA − DV
Rating
PG
boot
CC
REF
= 5 mA
http://onsemi.com
(on/off pin is open)
(drivers disabled, V
CC
pin must be under 100 nF.
= 1 V – T
J
= 25°C, for min/max values T
ref
8
< 5 mA – T
out
out
L
J
L
= 1 nF)
= 5 mA
= 5 mA – T
= 25°C
= 1 nF)
boot
J
=
>
J
=
Pin
19
19
19
19
18
18
18
18
J
6
6
6
6
6
4
4
4
4
4
3
3
7
7
= −40°C to +125°C, Max T
4.75
Min
140
4.9
10
5
2
3
5
0.01
Typ
100
5.9
6.9
1.6
6.6
64
20
10
30
60
40
5
5
5
5
7
9
J
= 150°C, V
Max
5.25
300
950
350
7.2
8.6
5.1
30
20
18
5
7
8
1
1
Unit
mA
mA
mV
mV
mA
mA
mV
mV
ms
ms
kW
mA
mA
nA
°C
°C
ms
ns
ns
CC
V
V
V
V
V
W
W

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