AT32UC3C2512C Automotive Atmel Corporation, AT32UC3C2512C Automotive Datasheet - Page 276

• Manufacturer Part Number: AT32UC3C2512C Automotive
• Manufacturer: Atmel Corporation

15.9.3
15.9.3.1
Table 15-13. User Page Fuse Description
• SS_ADRR: Size of the CPU RAM controlled by the Secure State
• SS_ADRF: Size of the Flash controlled by the Secure State
• WDTDISRV: WatchDog Timer auto disable at startup
15.9.4
9166C–AVR-08/11
WDTDISRV
31
23
15
7
The section of the CPU RAM controlled by the Secure State is from address 0x00000000 to address (SS_ADRR << 10).
The section of the Flash controlled by the Secure State is from address 0x80000000 to address (SS_ADRF << 10).
0: The WDT is automatically enabled at startup, the WDTAUTO fuse of the WDT is set.
1: The WDT is not automatically enabled at startup, the WDTAUTO fuse of the watchdog timer is not set.
Please refer to the WDT chapter for detail about time-out settings when the WDT is automatically enabled.
Fuses in User Page (address 0x80800000)
Bootloader Configuration
First word (address 0x80800000)
30
22
14
6
The devices are shipped with the User page erased (all bits 1).
The USB/USART bootloader uses two words in the flash user page to store its configuration:
Please refer to the bootloader documentation for more information.
• Configuration word 1 at address 0x808001FC is read first at boot time to know if it should
• Configuration word 2 at address 0x808001F8 stores the I/O conditions that determine which
start the ISP process unconditionally and whether it should use the configuration word 2
where further configuration is stored.
of the USB DFU ISP and the application to start at the end of the boot process.
29
21
13
5
28
20
12
4
SS_ADRF[15:8]
SS_ADRR[7:0]
SS_ADRF[7:0]
SS_ADRR[14:8]
27
19
11
3
26
18
10
2
25
17
9
1
AT32UC3C
24
16
8
0
276