SAM3SD8C Atmel Corporation, SAM3SD8C Datasheet - Page 1010

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SAM3SD8C

Manufacturer Part Number
SAM3SD8C
Description
Manufacturer
Atmel Corporation
Datasheets
38.5.6
38.5.7
38.5.8
38.5.9
38.6
38.6.1
1010
1010
Functional Description
SAM3S8/SD8
SAM3S8/SD8
Timer Triggers
PWM Event Line
Fault Output
Conversion Performances
Analog-to-digital Conversion
Table 38-3.
Timer Counters may or may not be used as hardware triggers depending on user requirements.
Thus, some or all of the timer counters may be unconnected.
PWM Event Lines may or may not be used as hardware triggers depending on user
requirements.
The ADC Controller has the FAULT output connected to the FAULT input of PWM. Please refer to
Section 38.6.13 ”Fault Output”
For performance and electrical characteristics of the ADC, see the product DC Characteristics
section.
The ADC uses the ADC Clock to perform conversions. Converting a single analog value to a 12-
bit digital data requires Tracking Clock cycles as defined in the field TRACKTIM of the
Mode Register” on page 1023
the same register. The ADC Clock frequency is selected in the PRESCAL field of the Mode Reg-
ister (ADC_MR). The tracking phase starts during the conversion of the previous channel. If the
tracking time is longer than the conversion time, the tracking phase is extended to the end of the
previous conversion.
The ADC clock range is between MCK/2, if PRESCAL is 0, and MCK/512, if PRESCAL is set to
255 (0xFF). PRESCAL must be programmed in order to provide an ADC clock frequency
according to the parameters given in the product Electrical Characteristics section.
ADC
ADC
ADC
ADC
ADC
ADC
I/O Lines
and implementation of the PWM in the product.
and Transfer Clock cycles as defined in the field TRANSFER of
AD10
AD11
AD12
AD13
AD14
AD9
PC13
PC15
PC12
PC29
PC30
PA22
11090A–ATARM–10-Feb-12
11090A–ATARM–10-Feb-12
X1
X1
X1
X1
X1
X1
“ADC

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