SAM3SD8C Atmel Corporation, SAM3SD8C Datasheet - Page 159

• Manufacturer Part Number: SAM3SD8C
• Manufacturer: Atmel Corporation

10.19.7.4
10.19.7.5
10.19.7.6
• Priority, byte offset 3
• Priority, byte offset 2
• Priority, byte offset 1
• Priority, byte offset 0
Each priority field holds a priority value, 0-15. The lower the value, the greater the priority of the corresponding interrupt.
The processor implements only bits[7:4] of each field, bits[3:0] read as zero and ignore writes.
See
interrupt priority array, that provides the software view of the interrupt priorities.
11090A–ATARM–10-Feb-12
11090A–ATARM–10-Feb-12
“The CMSIS mapping of the Cortex-M3 NVIC registers” on page 151
31
23
15
31
23
15
31
23
15
7
7
7
IPR2
IPR1
IPR0
30
22
14
30
22
14
30
22
14
6
6
6
29
21
13
29
21
13
29
21
13
5
5
5
28
20
12
28
20
12
28
20
12
4
4
4
Reserved
IP[11]
IP[10]
IP[9]
IP[8]
IP[6]
IP[5]
IP[4]
IP[3]
IP[2]
IP[1]
IP[0]
27
19
11
27
19
11
27
19
11
3
3
3
for more information about the IP[0] to IP[34]
26
18
10
26
18
10
26
18
10
2
2
2
SAM3S8/SD8
SAM3S8/SD8
25
17
25
17
25
17
9
1
9
1
9
1
24
16
24
16
24
16
8
0
8
0
8
0
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