SAM3SD8C Atmel Corporation, SAM3SD8C Datasheet - Page 1017

• Manufacturer Part Number: SAM3SD8C
• Manufacturer: Atmel Corporation

38.6.9
11090A–ATARM–10-Feb-12
11090A–ATARM–10-Feb-12
Input Gain and Offset
Table 38-5.
The ADC has a built in Programmable Gain Amplifier (PGA) and Programmable Offset.
The Programmable Gain Amplifier can be set to gains of 1/2, 1, 2 and 4. The Programmable
Gain Amplifier can be used either for single ended applications or for fully differential
applications.
If ANACH is set in ADC_MR the ADC can apply different gain and offset on each channel. Oth-
erwise the parameters of CH0 are applied to all channels.
The gain is configurable through the GAIN bit of the Channel Gain Register (ADC_CGR) as
shown in
Table 38-6.
To allow full range, analog offset of the ADC can be configured by the OFFSET bit of the Chan-
nel Offset Register (ADC_COR). The Offset is only available in Single Ended Mode.
Table 38-7.
Input Pins
AD10-AD11
AD12-AD13
AD14-AD15
OFFSET Bit
GAIN<0:1>
Table
00
01
10
11
0
1
Input Pins and Channel Number In Differential Mode
Gain of the Sample and Hold Unit: GAIN Bits and DIFF Bit.
Offset of the Sample and Hold Unit: OFFSET DIFF and Gain (G)
38-6.
OFFSET (DIFF = 0)
GAIN (DIFF = 0)
(G-1)Vrefin/2
1
1
2
4
0
Channel Number
CH10
CH12
CH14
OFFSET (DIFF = 1)
GAIN (DIFF = 1)
SAM3S8/SD8
SAM3S8/SD8
0.5
1
2
2
0
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