SAM3SD8C Atmel Corporation, SAM3SD8C Datasheet - Page 916

• Manufacturer Part Number: SAM3SD8C
• Manufacturer: Atmel Corporation

35.7.9
Name:
Address:
Access:
This register can only be written if the bits WPSWS2 and WPHWS2 are cleared in
939.
• SYNCx: Synchronous Channel x
0 = Channel x is not a synchronous channel.
1 = Channel x is a synchronous channel.
• UPDM: Synchronous Channels Update Mode
Notes:
• PTRM: PDC Transfer Request Mode
• PTRCS: PDC Transfer Request Comparison Selection
916
916
Value
0
1
2
3
UPDM
31
23
15
–
–
7
–
0
1
2
1. The update occurs at the beginning of the next PWM period, when the UPDULOCK bit in
2. The update occurs when the Update Period is elapsed.
SAM3S8/SD8
SAM3S8/SD8
PWM Sync Channels Mode Register
Control Register”
PWM_SCM
0x40020020
Read-write
MODE0
MODE1
MODE2
Name
–
PTRCS
PTRM
30
22
14
–
–
6
–
0
1
x
x
is set.
Automatic write of duty-cycle update registers by the PDC and automatic update of synchronous
channels
Reserved
Manual write of double buffer registers and manual update of synchronous channels
Manual write of double buffer registers and automatic update of synchronous channels
The WRDY flag in
are never set to 1.
The WRDY flag in
update period is elapsed, the PDC transfer request is never set to 1.
The WRDY flag in
are set to 1 as soon as the update period is elapsed.
The WRDY flag in
are set to 1 as soon as the selected comparison matches.
WRDY Flag and PDC Transfer Request
29
21
13
–
–
5
–
(2)
PTRM
“PWM Interrupt Status Register 2” on page 923
“PWM Interrupt Status Register 2” on page 923
“PWM Interrupt Status Register 2” on page 923
“PWM Interrupt Status Register 2” on page 923
28
20
12
–
–
4
–
SYNC3
27
19
11
–
–
–
3
Description
“PWM Write Protect Status Register” on page
SYNC2
26
18
10
–
–
–
2
“PWM Sync Channels Update
and the PDC transfer request
is set to 1 as soon as the
and the PDC transfer request
and the PDC transfer request
SYNC1
25
17
–
9
–
1
11090A–ATARM–10-Feb-12
11090A–ATARM–10-Feb-12
UPDM
(1)
(2)
SYNC0
24
16
–
8
–
0