SAM3SD8C Atmel Corporation, SAM3SD8C Datasheet - Page 392
SAM3SD8C
Manufacturer Part Number
SAM3SD8C
Description
Manufacturer
Atmel Corporation
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Figure 23-14. Early Read Wait State: Write with No Hold Followed by Read with No Setup
392
392
SAM3S8/SD8
SAM3S8/SD8
A[23:0]
D[7:0]
NWE
MCK
NRD
• if the write controlling signal has no hold time and the read controlling signal has no setup
• in NCS write controlled mode (WRITE_MODE = 0), if there is no hold timing on the NCS
• in NWE controlled mode (WRITE_MODE = 1) and if there is no hold timing (NWE_HOLD =
time
signal and the NCS_RD_SETUP parameter is set to 0, regardless of the read mode
23-15). The write operation must end with a NCS rising edge. Without an Early Read Wait
State, the write operation could not complete properly.
0), the feedback of the write control signal is used to control address, data, and chip select
lines. If the external write control signal is not inactivated as expected due to load
capacitances, an Early Read Wait State is inserted and address, data and control signals are
maintained one more cycle. See
(Figure
write cycle
23-14).
no hold
Early Read
wait state
Figure
23-16.
no setup
read cycle
11090A–ATARM–10-Feb-12
11090A–ATARM–10-Feb-12
(Figure
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