AD9644 Analog Devices, AD9644 Datasheet - Page 37

• Manufacturer Part Number: AD9644
• Description: 14-Bit, 80 MSPS/155 MSPS, 1.8V Dual, Serial Output A/D Converter
• Manufacturer: Analog Devices

Specifications of AD9644

• Resolution (bits): 14bit
• # Chan: 2
• Sample Rate: 155MSPS
• Analog Input Type: Diff-Bip
• Ain Range: 1.75 V p-p
• Adc Architecture: Pipelined

Data Sheet
Addr
(Hex)
0x65
0x66
0x67
0x6E
0x6F
0x70
0x71
0x72
0x73
0x74
0x75
Register
Name
JESD204A
bank
identification
number (BID)
(local)
JESD204A
lane
identification
number (LID)
for Lane 0
(local)
JESD204A
lane
identification
number (LID)
for Lane 1
(local)
JESD204A
scrambler
(SCR) and lane
(L)
configuration
register
JESD204A
number of
octets per
frame (F)
(global)
JESD204A
number of
frames per
multiframe (K)
(local)
JESD204A
number of
converters per
link (M)
(global)
JESD 204A
ADC
resolution (N)
and control
bits per
sample (CS)
(local)
JESD204A
total bits per
sample (N’)
(global)
JESD204A
samples per
converter (S)
frame cycle
(global)
JESD204A HD
and CF
configuration
(global)
Bit 7
(MSB)
Open
Open
Open
Enable
serial
scrambler
mode
(SCR)
(local)
Open
Open
Number of control bits
Open
Open
Enable
high
density
format
(HD = 0,
read only)
10 = two control bits
01 = one control bit
00 = no control bits
JESD204A number of octets per frame (F)—these bits are calculated based on the equation: F = M × (2 ÷ L)
per sample (CS)
11 = unused
(CS = 0)
(CS = 1)
(CS = 2)
Bit 6
Open
Open
Open
Open
Open
Open
Open
Open
Open
Bit 5
Open
Open
Open
Open
Open
Open
Open
Open
Open
Open
Bit 4
Open
Open
Open
Rev. C | Page 37 of 44
Number of control words per frame clock cycle per Link (CF) –
JESD204A serial lane identification (LID) number for Lane 0
JESD204A serial lane identification (LID) number for Lane 1
Samples per converter (S) frame cycle (read only)
JESD204A number of frames per multiframe (K)
Bit 3
Open
Open
JESD204A serial bank identification number (BID)
Total bits per sample (N’) (read only)
Converter resolution (N) (read only)
always 0 for the AD9644 (read only)
Always 1 for the AD9644
Bit 2
Open
Open
Bit 1
Open
Open
Bit 0
(LSB)
Lane control
(global)
0 = one lane
per link (L = 1)
1 = two lanes
per link (L = 2)
Number of
converters
per link (M)
0 = link
connected
to one ADC
(M = 1)
1 = link
connected
to two ADCs
(M = 2)
Default
Value
(Hex)
0x00
0x00
0x01
0x80
0x01
0x0F
0x00
0x4D
0x0F
0x00
0x00
AD9644
Default/
Comments
Read only
Read only
Read only
Read only