P87LPC768 NXP Semiconductors, P87LPC768 Datasheet - Page 21

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P87LPC768

Manufacturer Part Number
P87LPC768
Description
The P87LPC768 is a 20-pin single-chip microcontroller designed forlow pin count applications demanding high-integration, low costsolutions over a wide range of performance requirements
Manufacturer
NXP Semiconductors
Datasheet

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2002 Mar 12
Poll PWMCON0 to find that Transfer Bit PWMCON0.6 is “0”.
When “0”:
Write CNSW.(0:1) and CPSW.(0:4) for desired pulse widths and
counter reload values
Set PWMCON0 to Run and Transfer
PWMCON1: PWM Control register 1
Addr: 0DBH
Reset Value: 00H
BIT
PWMCON1.7
PWMCON1.6
PWMCON1.5
PWMCON1.4
PWMCON1.3
PWMCON1.2
PWMCON1.1
PWMCON1.0
Low power, low price, low pin count (20 pin) microcontroller
with 4 kB OTP 8-bit A/D, Pulse Width Modulator
BPEN
0
0
1
1
SYMBOL
PWM3B
PWM2B
PWM1B
PWM0B
BKCH
BPEN
BKEN
BKPS
BKCH
0
1
0
1
Always On, (Software Brake)
On when PWM not running (Brake Pin has no effect)
On when Brake Pin asserted (PWM run has no effect)
Not Allowed
FUNCTION
See table below
0= ”Brake” is asserted if P0.2(Brake Pin) is low.
1= ”Brake” is asserted if P0.2(Brake Pin) is high.
See table below.
0= ”Brake” is never asserted.
1= ”Brake” is enabled per table below.
0= PWM3 is low, when Brake is asserted.
1= PWM3 is high, when Brake is asserted.
0= PWM2 is low, when Brake is asserted.
1= PWM2 is high, when Brake is asserted.
0= PWM1 is low, when Brake is asserted.
1= PWM1 is high, when Brake is asserted.
0= PWM0 is low, when Brake is asserted.
1= PWM0 is high, when Brake is asserted.
BKCH
7
BKPS
6
BRAKE CONDITION
BPEN
5
19
Note that if a narrow pulse on the Brake Pin causes brake to be
asserted, it may not be possible to go through the above code
before the end of the pulse. In this case, in addition to the code
shown, an external latch on the Brake Pin may be required to
ensure that there is a smooth transition in going from brake to run.
The details for PWMCON1 are shown in the following table.
BKEN
4
PWM3B
3
PWM2B
2
PWM1B
1
P87LPC768
PWM0B
SU01388
0
Preliminary data

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