ST72344S4 STMicroelectronics, ST72344S4 Datasheet - Page 88

• Manufacturer Part Number: ST72344S4
• Description: 8-bit MCU
• Manufacturer: STMicroelectronics

Specifications of ST72344S4

• Up To 16 Kbytes Program Memory: single voltage extended Flash (XFlash) with readout and write protection, in-circuit and inapplication programming (ICP and IAP). 10K write/erase cycles guaranteed, data retention
• 256 Bytes Data Eeprom With Readout Protection. 300k Write/erase Cycles Guaranteed, Data Retention: 20 years at 55 °C.
• Clock Sources: crystal/ceramic resonator oscillators, high-accuracy internal RC oscillator or external clock
• 5 Power-saving Modes: Slow, Wait, Halt, Auto-wakeup from Halt and Active-halt
• 16-bit Timer A With: 1 input capture, 1 output compares, external clock input, PWM and pulse generator modes
• 16-bit Timer B With: 2 input captures, 2 output compares, PWM and pulse generator modes

On-chip peripherals
11.2
11.2.1
11.2.2
Caution:
11.2.3
11.2.4
88/247
Table 38.
Main clock controller with real-time clock and beeper
(MCC/RTC)
The main clock controller consists of three different functions:
●
●
●
Each function can be used independently and simultaneously.
Programmable CPU clock prescaler
The programmable CPU clock prescaler supplies the clock for the ST7 CPU and its internal
peripherals. It manages Slow power-saving mode (See
details).
The prescaler selects the f
MCCSR register: CP[1:0] and SMS.
Clock-out capability
The clock-out capability is an alternate function of an I/O port pin that outputs a f
to drive external devices. It is controlled by the MCO bit in the MCCSR register.
When selected, the clock out pin suspends the clock during Active-halt mode.
Real-time clock timer (RTC)
The counter of the real-time clock timer allows an interrupt to be generated based on an
accurate real-time clock. Four different time bases depending directly on f
The whole functionality is controlled by four bits of the MCCSR register: TB[1:0], OIE and
OIF.
When the RTC interrupt is enabled (OIE bit set), the ST7 enters Active-halt mode when the
HALT instruction is executed. See
details.
Beeper
The beep function is controlled by the MCCBCR register. It can output three selectable
frequencies on the BEEP pin (I/O port alternate function).
Address
(Hex.)
2A
30
a programmable CPU clock prescaler
a clock-out signal to supply external devices
a real-time clock timer with interrupt capability
Reset value
Reset value
WDGWR
Register
WDGCR
Watchdog timer register map and reset values
label
WDGA
CPU
7
0
0
-
Doc ID 12321 Rev 5
main clock frequency and is controlled by three bits in the
W6
Section 9.5: Active-halt mode on page 68
T6
6
1
1
W5
T5
5
1
1
W4
T4
4
1
1
Section 9.2: Slow mode
W3
T3
3
1
1
ST72344xx ST72345xx
W2
T2
2
1
1
OSC2
for more
W1
T1
are available.
1
1
1
for more
OSC2
W0
T0
clock
0
1
1