ST7232AJ2 STMicroelectronics, ST7232AJ2 Datasheet - Page 114

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ST7232AJ2

Manufacturer Part Number
ST7232AJ2
Description
8-BIT MCU WITH 8K FLASH/ROM, ADC, 4 TIMERS, SPI, SCI INTERFACE
Manufacturer
STMicroelectronics
Datasheet

Specifications of ST7232AJ2

Hdflash Endurance
100 cycles, data retention
Clock Sources
crystal/ceramic resonator oscillators and bypass for external clock
Four Power Saving Modes
Halt, Active-Halt, Wait and Slow
Main Clock Controller With
Real time base, Beep and Clock-out capabilities
Two 16-bit Timers With
2 input captures, 2 output compares, PWM and pulse generator modes
ST7232A
12.2 ABSOLUTE MAXIMUM RATINGS
Stresses above those listed as “absolute maxi-
mum ratings” may cause permanent damage to
the device. This is a stress rating only and func-
tional operation of the device under these condi-
12.2.1 Voltage Characteristics
12.2.2 Current Characteristics
Notes:
1. Directly connecting the RESET and I/O pins to V
is generated or an unexpected change of the I/O configuration occurs (for example, due to a corrupted program counter).
To guarantee safe operation, this connection has to be done through a pull-up or pull-down resistor (typical: 4.7kΩ for
RESET, 10kΩ for I/Os). For the same reason, unused I/O pins must not be directly tied to V
2. I
respected, the injection current must be limited externally to the I
while a negative injection is induced by V
corresponding V
3. All power (V
4. Negative injection disturbs the analog performance of the device. See note in
For best reliability, it is recommended to avoid negative injection of more than 1.6mA.
5. When several inputs are submitted to a current injection, the maximum ΣI
and negative injected currents (instantaneous values). These results are based on characterisation with ΣI
mum current injection on four I/O port pins of the device.
6. True open drain I/O port pins do not accept positive injection.
114/157
1
|∆V
INJ(PIN)
I
DDx
|V
INJ(PIN)
ΣI
V
V
V
V
V
SSA
Symbol
Symbol
ESD(HBM)
DD
INJ(PIN)
PP
IN
ESD(MM)
| and |∆V
I
I
VDD
VSS
must never be exceeded. This is implicitly insured if V
I
1) & 2)
IO
- V
- V
- V
2) & 4)
DD
SS
SS
SSx
2)
IN
) and ground (V
|
SSx
maximum must always be respected
|
Supply voltage
Programming Voltage
Input Voltage on true open drain pin
Input voltage on any other pin
Variations between different digital power pins
Variations between digital and analog ground pins
Electro-static discharge voltage (Human Body Model)
Electro-static discharge voltage (Machine Model)
Total current into V
(source)
Total current out of V
(sink)
Output current sunk by any standard I/O and control pin
Output current sunk by any high sink I/O pin
Output current source by any I/Os and control pin
Injected current on V
Injected current on RESET pin
Injected current on OSC1 and OSC2 pins
Injected current on Flash device pin PB0
Injected current on any other pin
Total injected current (sum of all I/O and control pins)
3)
SS
3)
) lines must always be connected to the external supply.
Ratings
IN
<V
DD
SS
PP
SS
. For true open-drain pads, there is no positive injection current, and the
power lines
Ratings
pin
ground lines
DD
or V
5) & 6)
SS
could damage the device if an unintentional internal reset
tions is not implied. Exposure to maximum rating
conditions for extended periods may affect device
reliability.
INJ(PIN)
IN
32-pin devices
32-pin devices
maximum is respected. If V
value. A positive injection is induced by V
INJ(PIN)
5)
“ADC Accuracy” on page
see
is the absolute sum of the positive
V
Maximum value
Maximum value
SS
Section 12.7.3 on page 127
V
-0.3 to V
SS
-0.3 to 6.5
DD
± 25
- 25
± 5
± 5
± 5
± 5
75
75
25
50
+5
6.5
13
50
50
or V
IN
DD
maximum cannot be
SS
+0.3
.
140.
INJ(PIN)
Unit
mA
mA
mA
Unit
mV
IN
V
maxi-
>V
DD

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