ST7232AJ2 STMicroelectronics, ST7232AJ2 Datasheet - Page 13

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ST7232AJ2

Manufacturer Part Number
ST7232AJ2
Description
8-BIT MCU WITH 8K FLASH/ROM, ADC, 4 TIMERS, SPI, SCI INTERFACE
Manufacturer
STMicroelectronics
Datasheet

Specifications of ST7232AJ2

Hdflash Endurance
100 cycles, data retention
Clock Sources
crystal/ceramic resonator oscillators and bypass for external clock
Four Power Saving Modes
Halt, Active-Halt, Wait and Slow
Main Clock Controller With
Real time base, Beep and Clock-out capabilities
Two 16-bit Timers With
2 input captures, 2 output compares, PWM and pulse generator modes
3 REGISTER & MEMORY MAP
As shown in
dressing 64K bytes of memories and I/O registers.
The available memory locations consist of 128
bytes of register locations, up to 384 bytes of RAM
and up to 8 Kbytes of user program memory. The
RAM space includes up to 256 bytes for the stack
from 0100h to 01FFh.
Figure 5. Memory Map
FFFFh
FFDFh
FFE0h
0000h
007Fh
0080h
0480h
047Fh
E000h
Interrupt & Reset Vectors
Figure
Program Memory
HW Registers
(see
(see
(384 Bytes)
(4K or 8K)
Reserved
RAM
Table
Table
5, the MCU is capable of ad-
2)
8)
or 047Fh
00FFh
01FFh
0080h
0100h
0200h
027Fh
Short Addressing
RAM (zero page)
256 Bytes Stack
The highest address bytes contain the user reset
and interrupt vectors.
IMPORTANT: Memory locations marked as “Re-
served” must never be accessed. Accessing a re-
served area can have unpredictable effects on the
device.
E000h
F000h
FFFFh
Reserved
8 KBytes
4 Kbytes
ST7232A
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