TMPM363F10FG Toshiba, TMPM363F10FG Datasheet - Page 539

• Manufacturer Part Number: TMPM363F10FG
• Manufacturer: Toshiba

Specifications of TMPM363F10FG

• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Available
• Rom (kbytes): 1024K
• Rom Type: Flash
• Ram (kbytes): 64K
• Number Of Pins: 100
• Package: LQFP(14x14)
• Vcc: 3V
• Cpu Mhz: 64
• Ssp (ch) Spi: 1
• I2c/sio (ch): 4
• Uart/sio (ch): 5
• Usb: Host
• Can: 1
• Ethernet: -
• External Bus Interface: Y
• Cs/wait Controller (ch): 4
• Dma Controller: 2
• 10-bit Da Converter: 8
• 10-bit Ad Converter: 8
• 12-bit Ad Converter: -
• 16-bit Timer / Counter: 16
• Motor / Igbt Control: -
• Real Time Clock: Y
• Watchdog Timer: Y
• Osc Freq Detect: -
• Clock Gear: Y
• Low-power Hold Function: Y
• Remote Control Interface: Y
• Hardware Cec Controller: Y
• Comparators: -
• Low-voltage Detector: -
• Etm Hardware Trace: 4-bit

16.5.3
CAN Bus
Message is valid
Set <RMP>
CANRMP register
Set <RML>
CANRML register
Copy ID and data
to mailbox
ison of the IDs depends on the <GAME> / <LAME> values of the global/local acceptance mask enable bit
MBnID3 in the mailbox and the data held in the global/local acceptance mask registers GAM / LAM.
the matching mailbox. At the same time, when the corresponding receive message pending bit
CANRMP<RMPx> is set to "1" and the mailbox interrupt is enabled (CANMBIM<MBIMx>="1"), the CAN
receive completion interrupt INTCANRX occurs. After a match is detected, no further ID comparison takes
place.
to the ID of the receive-only mailbox 31. When a match is detected, the settings of the received message are writ-
ten in receive-only mailbox 31.
the mailbox.
next message to this mailbox x is received, the corresponding receive message lost bit <RMLx> is set to "1".
In this case, mailbox x is overwritten with the new message.
The ID of a received message is compared to the ID of the mailbox set as the receive mailbox. The compar-
When a match is detected, the ID of the received message, the control bits, and data bytes are written in
If the ID of the received message does not match with any of the mailboxes 0 to 30, the ID is compared
If no match is detected, the received message will not be stored in the mailbox and no change occurs in
The <RMPx> bit must be cleared by the CPU after data is read. With the <RMPx> bit set to "1", if the
Figure 16-3 shows timing when a receive message lost occurs.
Receive Control Register
Figure 16-3 Timing when a Receive Message Lost Occurs
SOF
Message 1
for mailbox “x”
EOF
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IFS
SOF
Message 2
for mailbox “x”
EOF
TMPM363F10FG
IFS