TMPM363F10FG Toshiba, TMPM363F10FG Datasheet - Page 86

• Manufacturer Part Number: TMPM363F10FG
• Manufacturer: Toshiba

Specifications of TMPM363F10FG

• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Available
• Rom (kbytes): 1024K
• Rom Type: Flash
• Ram (kbytes): 64K
• Number Of Pins: 100
• Package: LQFP(14x14)
• Vcc: 3V
• Cpu Mhz: 64
• Ssp (ch) Spi: 1
• I2c/sio (ch): 4
• Uart/sio (ch): 5
• Usb: Host
• Can: 1
• Ethernet: -
• External Bus Interface: Y
• Cs/wait Controller (ch): 4
• Dma Controller: 2
• 10-bit Da Converter: 8
• 10-bit Ad Converter: 8
• 12-bit Ad Converter: -
• 16-bit Timer / Counter: 16
• Motor / Igbt Control: -
• Real Time Clock: Y
• Watchdog Timer: Y
• Osc Freq Detect: -
• Clock Gear: Y
• Low-power Hold Function: Y
• Remote Control Interface: Y
• Hardware Cec Controller: Y
• Comparators: -
• Low-voltage Detector: -
• Etm Hardware Trace: 4-bit

7.1
Overview
7.1.2
Return from exception
Detection by CG/CPU
Handling by CPU
Execution of ISR
Branch to ISR
Processing
Handling Flowchart
Each step is described later in this chapter.
The following shows how an exception/interrupt is handled. In the following descriptions,
indicates hardware handling.
The CG/CPU detects the exception request.
The CPU handles the exception request.
The CPU branches to the corresponding interrupt service routine (ISR).
Necessary processing is executed.
The CPU branches to another ISR or returns to the previous program.
Page 60
Description
indicates software handling.
TMPM363F10FG
Section 7.1.2.1
Section 7.1.2.2
Section 7.1.2.4
Section 7.1.2.4
See