TMPM364F10FG Toshiba, TMPM364F10FG Datasheet - Page 92

• Manufacturer Part Number: TMPM364F10FG
• Manufacturer: Toshiba

Specifications of TMPM364F10FG

• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Available
• Rom (kbytes): 1024K
• Rom Type: Flash
• Ram (kbytes): 64K
• Number Of Pins: 144
• Package: LQFP(20x20)
• Vcc: 3V
• Cpu Mhz: 64
• Ssp (ch) Spi: 1
• I2c/sio (ch): 5
• Uart/sio (ch): 12
• Usb: Host
• Can: 1
• Ethernet: -
• External Bus Interface: Y
• Cs/wait Controller (ch): 4
• Dma Controller: 2
• 10-bit Da Converter: -
• 10-bit Ad Converter: 16
• 12-bit Ad Converter: -
• 16-bit Timer / Counter: 16
• Motor / Igbt Control: -
• Real Time Clock: Y
• Watchdog Timer: Y
• Osc Freq Detect: -
• Clock Gear: Y
• Low-power Hold Function: Y
• Remote Control Interface: Y
• Hardware Cec Controller: Y
• Comparators: -
• Low-voltage Detector: -
• Etm Hardware Trace: 4-bit

7.1
Overview
Note:
<PRI_n> bit is defined as a 3-bit configuration with this product.
Table 7-2 Priority grouping setting
(3)
<PRIGROUP[2:0]>
setting
Note:If the configuration of <PRI_n> is less than 8 bits, the lower bit is "0". For the exam-
Priority setting
000
001
010
011
100
101
110
111
・ Priority level
・ Priority grouping
ple, in the case of 3-bit configuration, the priority is set as <PRI_n[7:5]> and <PRI_n[4:0]
> is "00000".
are set to <PRI_n> bit in the system handler priority register.
the priority varies from 3 bits to 8 bits depending on products. Thus, the range of priority val-
ues you can specify is different depending on products.
255. The highest priority is "0". If multiple elements with the same priority exist, the small-
er the number, the higher the priority becomes.
tion interrupt and reset control register, <PRI_n> can be divided into the pre-emption prior-
ity and the sub priority.
emption priority, then it is compared with the sub priority. If the sub priority is the same
as the priority, the smaller the exception number, the higher the priority.
ority in the table are the number in the case that <PRI_n> is defined as an 8-bit configuration.
The external interrupt priority is set to the interrupt priority register and other exceptions
The configuration <PRI_n> can be changed, and the number of bits required for setting
In the case of 8-bit configuration, the priority can be configured in the range from 0 to
The priority group can be split into groups. By setting the <PRIGROUP> of the applica-
A priority is compared with the pre-emption priority. If the priority is the same as the pre-
The Table 7-2 shows the priority group setting. The pre-emption priority and the sub pri-
Pre-emption
None
[7:1]
[7:2]
[7:3]
[7:4]
[7:5]
[7:6]
field
[7]
<PRI_n[7:0]>
Subpriority
field
[1:0]
[2:0]
[3:0]
[4:0]
[5:0]
[6:0]
[7:0]
[0]
Page 66
pre-emption
Number of
priorities
128
64
32
16
8
4
2
1
subpriorities
Number of
128
256
16
32
64
2
4
8
TMPM364F10FG