ADRF6702 Analog Devices, Inc., ADRF6702 Datasheet - Page 15

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ADRF6702

Manufacturer Part Number
ADRF6702
Description
1550 Mhz To 2150 Mhz Quadrature Modulator With Integrated Fractional-n Pll And Vco
Manufacturer
Analog Devices, Inc.
Datasheet

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DB23
DB23
Preliminary Technical Data
REGISTER 5 LO PATH AND MODULATOR CONTROL
The modulator output or the complete modulator can be
disabled using the modulator bias enable and modulator
output enable addresses of register 5.
The LO port (pins LOP and LON) can be used to apply an
external 2X LO (i.e. bypass internal PLL) to the IQ Modulator.
A differential LO drive of 0 dBm is recommended for best LO
suppression at the RF output. When using an external
frequency stable local oscillator signal to commutate the mixer
core it is possible to shut down the PLL circuitry through the
PLL enable address of register 5.
The LO port can also be used as an output where a 2X or 1X LO
can be brought out and used to drive another mixer. The
nominial output power provided at the LO port is +3 dBm.
The LO port’s mode of operation is determined by the status of
the LOSEL pin (3.3 V logic) along with the settings in a number
of internal registers.
0
0
DB22
DB22
0
0
DB21
DB21
0
0
DB20
DB20
0
0
DB19
DB19
0
0
DB18
DB18
0
0
DB17
DB17
0
0
DB16
DB16
0
0
Figure 10. LO Path and Modulator Control (R5)
DB15
DB15
0
0
DB14
DB14
0
0
DB13
DB13
0
0
Rev. PrE | Page 15 of 18
DB12
DB12
0
0
DB11
DB11
0
0
Table 6. LO Port Configuration
X = Don’t Care
The device’s internal VCO can also be bypassed. In this case,
the charge pump output drives an external VCO through the
loop filter. The loop is completed by routing the VCO in to the
device through the LO Port.
Output (1XLO)
Output (1XLO)
Output (2XLO)
Output (2XLO)
DB10
DB10
Input (2XLO)
0
0
LON/LOP
Function
DB9
DB9
0
0
DB8
DB8
0
0
Enable
Enable
MBE
MBE
MBE
MBE
Mod
Mod
Bias
Bias
DB7
DB7
LOSEL
0
0
1
1
0
X
1
X
1
(
(
RFEN
RFEN
Enable
Enable
Output
Output
Disable
Disable
Enable
Enable
RFEN
RFEN
DB6
DB6
RF
RF
0
0
1
1
Mod Bias Enable
Mod Bias Enable
R5:DB3
(LDRV)
default)
default)
Divider
Divider
LDIV LO Output Divide Mode
LDIV LO Output Divide Mode
Disable
Disable
Enable (default)
Enable (default)
Output
Output
LDIV
LDIV
DB5
DB5
RF Output Enable
RF Output Enable
0
0
1
1
LO
LO
0
1
X
1
X
Divide by 1
Divide by 1
Divide by 2 (default)
Divide by 2 (default)
Control
Control
LXL
LXL
In/Out
In/Out
DB4
DB4
LXL
LXL
0
0
1
1
LO
LO
I
I
LO Output (default)
LO Output (default)
LO
LO
R5:DB5
(LDIV)
LDRV
LDRV
Enable
Enable
Output
Output
LDRV
LDRV
Driver
Driver
DB3
DB3
0
0
1
1
nput
nput
LO
LO
X
0
0
1
1
LO In/Out
LO In/Out
Control
Control
O
O
Driver Off (default)
Driver Off (default)
Driver
Driver
C3(1)
C3(1)
DB2
DB2
ADRF6702
Driver Enable
Driver Enable
Control Bits
Control Bits
LO Output
LO Output
R5:DB4(LXL)
n
n
C2(0)
C2(0)
DB1
DB1
1
X
X
X
X
C1(1)
C1(1)
DB0
DB0

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