ADRF6702 Analog Devices, Inc., ADRF6702 Datasheet - Page 8

no-image

ADRF6702

Manufacturer Part Number
ADRF6702
Description
1550 Mhz To 2150 Mhz Quadrature Modulator With Integrated Fractional-n Pll And Vco
Manufacturer
Analog Devices, Inc.
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ADRF6702ACPZ-R7
Manufacturer:
ADI
Quantity:
5 000
Part Number:
ADRF6702ACPZ-R7
Manufacturer:
ADI原装
Quantity:
20 000
ADRF6702
Preliminary Technical Data
THEORY OF OPERATION
The ADRF6702 integrates a high performance IQ modulator
with a state of the art fractional-N PLL. The PLL also integrates
a low noise VCO. The programmable SPI port allows the user to
control the fractional-N PLL functions and the modulator
optimization functions as well as allowing for an externally
applied LO or VCO.
The quadrature modulator core within the ADRF670X family is
the next generation of industry leading family of modulators
from Analog Devices. The baseband inputs are converted to
currents and then mixed to RF using high-performance NPN
transistors. The mixer output currents are transformed to a
single-ended RF output using an integrated RF transformer
balun. The high performance active mixer core, coupled with
the low-loss RF transformer balun results in an exceptional
OIP3 and OP1dB, with a very low output noise floor for
excellent dynamic range. The use of a passive transformer balun
rather than an active output stage leads to an improvement in
OIP3 with no sacrifice in noise floor. Over the specified
frequency range the four devices in the ADRF670X typically
provide RF output P1dB of 15dBm, OIP3 of 30dBm, and RF
output noise floor of -158dBm/Hz. Typical image rejection
under these conditions is 40dB with no additional I and Q gain
compensation.
The fractional divide function of the PLL allows the frequency
multiplication value from REFIN to LO Out to be a fractional
value rather than restricted to an integer as in traditional PLLs.
In operation, this multiplication value is INT+(FRAC/MOD)
where INT is the integer value, FRAC is the fractional value and
MOD is the modulus value, all programmable via the SPI port.
In previous frac-N PLL designs, the fractional multiplication
was achieved by periodically changing the fractional value in a
deterministic way. The down side of this was often spurious
components close to the fundamental signal. In the ADRF670x
family, a sigma-delta modulator is used to distribute the
fractional value randomly, thus significantly reducing the
spurious content due to the fractional function.
Rev. PrE | Page 8 of 18

Related parts for ADRF6702