CD4017BMS Intersil Corporation, CD4017BMS Datasheet - Page 9

• Manufacturer Part Number: CD4017BMS
• Description: CMOS Counter/Dividers
• Manufacturer: Intersil Corporation

Typical Performance Characteristics
When the N
S-R flip-flop (constructed from two NOR gates of the CD4001B)
generates a reset pulse which clears the CD4017BMS or
CD4022BMS to its zero count. At this time, if the N
output is greater than or equal to 6 in the CD4017BMS or 5 in
the CD4022BMS, the C
CD4017BMS or CD4022BMS counter section. The “0”
FIGURE 11. TYPICAL PROPAGATION DELAY TIME AS A
DECODE
DECODE
FIGURE 13. PROPAGATION DELAY, SETUP, AND RESET
OUTPUT
OUTPUT
INHIBIT
CLOCK
CLOCK
CARRY
RESET
“0” OR
700
600
500
400
300
200
100
Delays Measured Between 50% levels on All Waveforms
1-9
0
AMBIENT TEMPERATURE (T
CLOCK
th
10
FUNCTION OF LOAD CAPACITANCE
(CLOCK TO CARRY OUT)
REMOVAL TIME WAVEFORMS
decoded output is reached (N
20
TS
SUPPLY VOLTAGE (VDD) = 5V
LOAD CAPACITANCE (CL) (pF)
TPLH
TPHL
30
OUT
C
CE
Q0 Q1 . . . Q8 Q9
FIRST STAGE
40
9 DECODED
OUTPUTS
CD4017BMS
line goes high to clock the next
9
50
TPHL
A
R
) = +25
60
o
C
70
th
FIGURE 15. CASCADING THE CD4017BMS
clock pulse) the
TPRHL
TPRLH
CD4017BMS, CD4022BMS
80
th
10V
90
15V
decoded
(Continued)
100
C
CE
Q0 Q1 . . . Q8 Q9
INTERMEDIATE STAGE
8 DECODED
CD4017BMS
OUTPUTS
R
decoded output also goes high at this time. Coincidence of the
clock low and decoded “0” output low resets the S-R flip-flop to
enable the CD4017BMS or CD4022BMS. If the N
output is less than 6 (CD4017BMS) or 5 (CD4022BMS), the
C
this case “0” decoded output may be used to perform the clock-
ing function for the next counter.
FIGURE 12. TYPICAL DYNAMIC POWER DISSIPATION AS A
FIGURE 14. DIVIDE BY N COUNTER (N 10) WITH N DECODED
OUT
CLOCK
CLOCK
INHIBIT
10
10
10
10
10
line will not go high and, therefore, cannot be used. In
5
4
3
2
1
SUPPLY VOLTAGE
(VDD) = 15V
CL = 50pF
CL = 15pF
LOAD CAPACITANCE
FUNCTION OF CLOCK INPUT FREQUENCY
OUTPUTS
0
CLOCK INPUT FREQUENCY (fCL) (kHz)
1
CD4017BMS
CD4022BMS
N DECODED
10
OUTPUTS
2
OR
. . .
AMBIENT TEMPERATURE (T
INPUT tr = tf = 20ns
C
CE
Q0 Q1 . . . Q8 Q9
10
LAST STAGE
CD4017BMS
8 DECODED
OUTPUTS
2
O DECODED
N
OUTPUTS
R
5V
10
10V
3
10V
C
f = CLOCK
ALTERNATE C
FOR N = 2 TO 10
f = CLOCK
10
OUT
A
) = +25
4
th
FOR N
decoded
o
C
10
N
N
5
OUT
6