DS2154 Dallas Semiconducotr, DS2154 Datasheet - Page 52

• Manufacturer Part Number: DS2154
• Description: Enhanced E1 Single Chip Transceiver
• Manufacturer: Dallas Semiconducotr

TIR1/TIR2/TIR3/TIR4: TRANSMIT IDLE REGISTERS (Address=26 to 29 Hex)
[Also used for Per-Channel Loopback]
NOTE:
If CCR3.5=1, then a 0 in the TIRs implies that channel data is to be sourced from TSER and a 1 implies
that channel data is to be sourced from the output of the receive side framer (i.e., Per-Channel Loopback;
see Figure 1-1).
TIDR: TRANSMIT IDLE DEFINITION REGISTER (Address=2A Hex)
8.1.2 Per-Channel Code Insertion
The second method involves using the Transmit Channel Control Registers (TCC1/2/3/4) to determine
which of the 32 E1 channels should be overwritten with the code placed in the Transmit Channel
Registers (TC1 to TC32). This method is more flexible than the first in that it allows a different 8-bit code
to be placed into each of the 32 E1 channels.
TC1 TO TC32: TRANSMIT CHANNEL REGISTERS (Address=60 to 7F Hex)
(for brevity, only channel 1 is shown; see Table 1-3 for other register address)
(MSB)
(MSB)
(MSB)
CH16
CH24
CH32
TIDR7
CH8
C7
SYMBOL
SYMBOL
SYMBOL
TIDR7
TIDR0
CH32
CH1
C7
CH15
CH23
CH31
CH7
TIDR6
C6
POSITION
POSITION
POSITION
CH14
CH22
CH30
CH6
TIDR.7
TIDR.0
TIR4.7
TIR1.0
TC1.7
TIDR5
C5
CH13
CH21
CH29
CH5
NAME AND DESCRIPTION
Transmit Idle Registers.
0=do not insert the Idle Code in the TIDR into this channel
1=insert the Idle Code in the TIDR into this channel
NAME AND DESCRIPTION
MSB of the Idle Code (this bit is transmitted first)
LSB of the Idle Code (this bit is transmitted last)
NAME AND DESCRIPTION
MSB of the Code (this bit is transmitted first)
TIDR4
C4
CH12
CH20
CH28
CH4
52 of 87
TIDR3
C3
CH11
CH19
CH27
CH3
TIDR2
CH10
CH18
CH26
CH2
C2
CH17
CH25
CH1
CH9
TIDR1
(LSB)
C1
TIR1 (26)
TIR2 (27)
TIR3 (28)
TIR4 (29)
TIDR0
(LSB)
(LSB)
C0
DS2154