RTL8181 ETC, RTL8181 Datasheet - Page 27

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RTL8181

Manufacturer Part Number
RTL8181
Description
Wireless LAN Access Point/Gateway Controller
Manufacturer
ETC
Datasheet

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Tx Status Descriptor (after transmitting, OWN=0, Tx status mode) After having transmitted, the Tx descriptor turns to be a Tx
status descriptor.
O
W
N
=
0
Byte
Offset#
0
0
0
0
0
0
0
0
CONFIDENTIAL
0
4
4
4
8
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9
E
O
R
F
S
L
S
Bit# Bit Name Description
31
30
29
28
27-26 -
25
24
23
15-0 Frame_Le
31-18 RSEV
17-16 TAGC
15-0 VLAN_T
31-0 TxBuff
R
E
S
V
R
E
S
V
OWN
EOR
FS
LS
UNF
-
TES
ngth
AG
U
N
F
RESV
R
E
S
V
T
E
S
O
W
C
When set, indicates that the descriptor is owned by NIC. When clear
indicates that the descriptor is owned by host system. NIC clears this
bit when the relative buffer data is already transmitted. In this case,
OWN=0.
End of descriptor Ring. When set, indicates that this is the last
descriptor in descriptor ring. When NIC’s internal transmit pointer
reaches here, the pointer will return to the first descriptor of the
descriptor ring after transmitting the data relative to this descriptor.
First segment descriptor. When set, indicates that this is the first
descriptor of a Tx packet, and this descriptor is pointing to the first
segment of the packet.
Last segment descriptor. When set, indicates that this is the last
descriptor of a Tx packet, and this des criptor is pointing to the last
segment of the packet.
Reserved.
FIFO underrun. A status bit. NIC sets this bit to inform driver that
FIFO underrun had ever occurred before this packet transmitted.
Reserved.
Transmit Error Summary. When set, indicates that at least one of the
following errors occurred: OWC, EXC, LNKF. This bit is valid only
when LS (Last segment bit) is set.
Transmit frame length. This field indicates the length in TX buffer, in
byte, to be transmitted
Reserved.
VLAN tag control bits:
00: Packet remains unchanged when transmitting
10: Add TAG. 0x8100 (Ethernet encoded tag protocol ID, indicating
that this is a IEEE 802.1Q VLAN packet) is inserted after source
address, and 2 bytes are inserted after tag protocol ID from
VLAN_TAG field in transmit descriptor.
The 2-byte VLAN_TAG contains information, from upper layer, of
user priority, canonical format indicator, and VLAN ID. Please refer to
IEEE 802.1Q for detailed VLAN tag information.
Logic Address of transmission buffer.
L
N
K
F
E
X
C
CC3-0
TX_BUFFER_ADDRESS
Dummy
27
Frame_Length
VLAN_TAG
8
7
6
5
4
3
2
1
0
Offset 0
Offset 4
Offset 8
Offset 12
RTL8181
v1.0

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