IDT72V3626L10PF IDT, Integrated Device Technology Inc, IDT72V3626L10PF Datasheet

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IDT72V3626L10PF

Manufacturer Part Number
IDT72V3626L10PF
Description
IC FIFOSYNC 256X36X2 10NS 128QFP
Manufacturer
IDT, Integrated Device Technology Inc
Series
72Vr
Datasheet
1.IDT72V3626L15PF8.pdf (36 pages)

Specifications of IDT72V3626L10PF

Function
Asynchronous, Synchronous
Memory Size
18.4K (256 x 36 x 2)
Data Rate
100MHz
Access Time
10ns
Voltage - Supply
3 V ~ 3.6 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
128-TQFP, 128-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
72V3626L10PF
©
FEATURES:
• • • • •
• • • • •
• • • • •
• • • • •
• • • • •
• • • • •
IDT and the IDT logo are registered trademarks of Integrated Device Technology, Inc. SyncFIFO is a trademark of Integrated Device Technology, Inc.
COMMERCIAL TEMPERATURE RANGE
FUNCTIONAL BLOCK DIAGRAM
EFA/ORA
FS1/SEN
FFA/IRA
Memory storage capacity:
Clock frequencies up to 100 MHz (6.5ns access time)
Two independent FIFOs buffer data between one bidirectional
36-bit port and two unidirectional 18-bit ports (Port C receives
and Port B transmits)
18-bit (word) and 9-bit (byte) bus sizing of 18 bits (word) on
Ports B and C
Select IDT Standard timing (using EFA, EFB, FFA, and FFC flag
functions) or First Word Fall Through Timing (using ORA, ORB,
IRA, and IRC flag functions)
Programmable Almost-Empty and Almost-Full flags; each has
FS0/SD
2009 Integrated Device Technology, Inc. All right reserved. Product specifications subject to change without notice.
MRS1
A
MBF2
CLKA
W/RA
PRS1
MBA
SPM
0
CSA
ENA
AEA
AFA
-A
35
Control
FIFO1,
Mail1
Reset
Logic
Port-A
Logic
IDT72V3626–256 x 36 x 2
IDT72V3636–512 x 36 x 2
IDT72V3646–1,024 x 36 x 2
36
36
10
FIFO1
FIFO2
Programmable Flag
3.3 VOLT CMOS TRIPLE BUS
SyncFIFO
256 x 36 x 2, 512 x 36 x 2,
1,024 x 36 x 2
Offset Registers
36
Pointer
Pointer
Write
Read
36
Status Flag
Status Flag
1,024 x 36
RAM ARRAY
RAM ARRAY
1,024 x 36
TM
256 x 36
512 x 36
256 x 36
512 x 36
Register
Register
Mail 1
Mail 2
Logic
Logic
WITH BUS-MATCHING
1
Pointer
Pointer
Timing
Read
Mode
Write
• • • • •
• • • • •
• • • • •
• • • • •
• • • • •
• • • • •
• • • • •
• • • • •
• • • • •
• • • • •
three default offsets (8, 16 and 64)
Serial or parallel programming of partial flags
Big- or Little-Endian format for word and byte bus sizes
Master Reset clears data and configures FIFO, Partial Reset
clears data but retains configuration settings
Mailbox bypass registers for each FIFO
Free-running CLKA, CLKB and CLKC may be asynchronous or
coincident (simultaneous reading and writing of data on a single
clock edge is permitted)
Auto power down minimizes power dissipation
Available in a space-saving 128-pin Thin Quad Flatpack (TQFP)
Pin and functionally compatible versions of 5V operating
IDT723626/723636/723646
Industrial temperature range (–40° ° ° ° ° C to +85° ° ° ° ° C) is available
Green parts available, see ordering information
36
36
FEBRUARY 2009
(B and C)
Common
18
Control
Control
Control
Port-B
Logic
Port-C
FIFO2,
Mail2
Reset
Logic
Logic
Port
Logic
18
IDT72V3626
IDT72V3636
IDT72V3646
4665 drw01
MBF1
B
CLKB
RENB
CSB
MBB
SIZEB
EFB/ORB
AEB
BE
FWFT
FFC/IRC
AFC
MRS2
PRS2
C
CLKC
WENC
MBC
SIZEC
DSC-4665/6
0
0
-B
-C
17
17

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IDT72V3626L10PF Summary of contents

Page 1

FEATURES: • • • • • Memory storage capacity: IDT72V3626–256 IDT72V3636–512 IDT72V3646–1,024 • • • • • Clock frequencies up to 100 MHz (6.5ns access time) • • ...

Page 2

IDT72V3626/72V3636/72V3646 CMOS 3.3V TRIPLE BUS SyncFIFO WITH BUS-MATCHING 256 512 1,024 DESCRIPTION: The IDT72V3626/72V3636/72V3646 are pin and functionally compatible versions of the IDT723626/723636/723646, designed to run off a ...

Page 3

IDT72V3626/72V3636/72V3646 CMOS 3.3V TRIPLE BUS SyncFIFO IDT72V3626/72V3636/72V3646 CMOS 3.3V Triple Bus SyncFIFO WITH BUS-MATCHING 256 512 1,024 with Bus-Matching 256x36x2, 512x36x2, 1,024x36x2 each port are independent of one ...

Page 4

IDT72V3626/72V3636/72V3646 CMOS 3.3V TRIPLE BUS SyncFIFO WITH BUS-MATCHING 256 512 1,024 PIN DESCRIPTIONS Symbol Name I/O A0-A35 Port A Data I/O AEA Port A Almost- O Empty Flag ...

Page 5

IDT72V3626/72V3636/72V3646 CMOS 3.3V TRIPLE BUS SyncFIFO IDT72V3626/72V3636/72V3646 CMOS 3.3V Triple Bus SyncFIFO WITH BUS-MATCHING 256 512 1,024 with Bus-Matching 256x36x2, 512x36x2, 1,024x36x2 PIN DESCRIPTIONS (Continued) Symbol Name I/O ...

Page 6

IDT72V3626/72V3636/72V3646 CMOS 3.3V TRIPLE BUS SyncFIFO WITH BUS-MATCHING 256 512 1,024 ABSOLUTE MAXIMUM RATINGS OVER OPERATING FREE-AIR TEMPERATURE RANGE (Unless otherwise noted) Symbol V Supply Voltage Range CC ...

Page 7

IDT72V3626/72V3636/72V3646 CMOS 3.3V TRIPLE BUS SyncFIFO IDT72V3626/72V3636/72V3646 CMOS 3.3V Triple Bus SyncFIFO WITH BUS-MATCHING 256 512 1,024 with Bus-Matching 256x36x2, 512x36x2, 1,024x36x2 DETERMINING ACTIVE CURRENT CONSUMPTION AND POWER ...

Page 8

IDT72V3626/72V3636/72V3646 CMOS 3.3V TRIPLE BUS SyncFIFO WITH BUS-MATCHING 256 512 1,024 TIMING REQUIREMENTS OVER RECOMMENDED RANGES OF SUPPLY VOLTAGE AND OPERATING FREE-AIR TEMPERATURE Commercial: V =3.3V± 0.30V; for ...

Page 9

IDT72V3626/72V3636/72V3646 CMOS 3.3V TRIPLE BUS SyncFIFO IDT72V3626/72V3636/72V3646 CMOS 3.3V Triple Bus SyncFIFO WITH BUS-MATCHING 256 512 1,024 with Bus-Matching 256x36x2, 512x36x2, 1,024x36x2 SWITCHING CHARACTERISTICS OVER RECOMMENDED RANGES OF ...

Page 10

IDT72V3626/72V3636/72V3646 CMOS 3.3V TRIPLE BUS SyncFIFO WITH BUS-MATCHING 256 512 1,024 SIGNAL DESCRIPTION MASTER RESET (MRS1, MRS2) After power up, a Master Reset operation must be performed by ...

Page 11

IDT72V3626/72V3636/72V3646 CMOS 3.3V TRIPLE BUS SyncFIFO IDT72V3626/72V3636/72V3646 CMOS 3.3V Triple Bus SyncFIFO WITH BUS-MATCHING 256 512 1,024 with Bus-Matching 256x36x2, 512x36x2, 1,024x36x2 Following Master Reset, the level applied ...

Page 12

IDT72V3626/72V3636/72V3646 CMOS 3.3V TRIPLE BUS SyncFIFO WITH BUS-MATCHING 256 512 1,024 TABLE 2 — PORT A ENABLE FUNCTION TABLE CSA W/RA ENA ...

Page 13

IDT72V3626/72V3636/72V3646 CMOS 3.3V TRIPLE BUS SyncFIFO IDT72V3626/72V3636/72V3646 CMOS 3.3V Triple Bus SyncFIFO WITH BUS-MATCHING 256 512 1,024 with Bus-Matching 256x36x2, 512x36x2, 1,024x36x2 SYNCHRONIZED FIFO FLAGS Each FIFO is ...

Page 14

IDT72V3626/72V3636/72V3646 CMOS 3.3V TRIPLE BUS SyncFIFO WITH BUS-MATCHING 256 512 1,024 FULL/INPUT READY FLAGS (FFA/IRA, FFC/IRC) These are dual purpose flags. In FWFT mode, the Input Ready (IRA ...

Page 15

IDT72V3626/72V3636/72V3646 CMOS 3.3V TRIPLE BUS SyncFIFO IDT72V3626/72V3636/72V3646 CMOS 3.3V Triple Bus SyncFIFO WITH BUS-MATCHING 256 512 1,024 with Bus-Matching 256x36x2, 512x36x2, 1,024x36x2 The data in a mail register ...

Page 16

IDT72V3626/72V3636/72V3646 CMOS 3.3V TRIPLE BUS SyncFIFO WITH BUS-MATCHING 256 512 1,024 BYTE ORDER ON PORT A: BYTE ORDER ON PORT B: BE SIZEB SIZEB L ...

Page 17

IDT72V3626/72V3636/72V3646 CMOS 3.3V TRIPLE BUS SyncFIFO IDT72V3626/72V3636/72V3646 CMOS 3.3V Triple Bus SyncFIFO WITH BUS-MATCHING 256 512 1,024 with Bus-Matching 256x36x2, 512x36x2, 1,024x36x2 BYTE ORDER ON PORT A: BYTE ...

Page 18

IDT72V3626/72V3636/72V3646 CMOS 3.3V TRIPLE BUS SyncFIFO WITH BUS-MATCHING 256 512 1,024 CLKA 1 CLKB t RSTS MRS1 BE/FWFT SPM FS1,FS0 FFA/IRA EFB/ORB t RSF AEB t RSF AFA ...

Page 19

IDT72V3626/72V3636/72V3646 CMOS 3.3V TRIPLE BUS SyncFIFO IDT72V3626/72V3636/72V3646 CMOS 3.3V Triple Bus SyncFIFO WITH BUS-MATCHING 256 512 1,024 with Bus-Matching 256x36x2, 512x36x2, 1,024x36x2 CLKA 1 CLKB t RSTS PRS1 ...

Page 20

IDT72V3626/72V3636/72V3646 CMOS 3.3V TRIPLE BUS SyncFIFO WITH BUS-MATCHING 256 512 1,024 CLKA 4 MRS1, MRS2 t FSS t FSH SPM t FSS t FSH 0,0 FS1,FS0 FFA/IRA ENA ...

Page 21

IDT72V3626/72V3636/72V3646 CMOS 3.3V TRIPLE BUS SyncFIFO IDT72V3626/72V3636/72V3646 CMOS 3.3V Triple Bus SyncFIFO WITH BUS-MATCHING 256 512 1,024 with Bus-Matching 256x36x2, 512x36x2, 1,024x36x2 t CLK t t CLKH CLKL ...

Page 22

IDT72V3626/72V3636/72V3646 CMOS 3.3V TRIPLE BUS SyncFIFO WITH BUS-MATCHING 256 512 1,024 CLKC FFC/IRC HIGH t ENS2 MBC t ENS2 WENC t DS C0-C8 DATA SIZE TABLE FOR BYTE ...

Page 23

IDT72V3626/72V3636/72V3646 CMOS 3.3V TRIPLE BUS SyncFIFO IDT72V3626/72V3636/72V3646 CMOS 3.3V Triple Bus SyncFIFO WITH BUS-MATCHING 256 512 1,024 with Bus-Matching 256x36x2, 512x36x2, 1,024x36x2 CLKB EFB/ORB HIGH CSB MBB t ...

Page 24

IDT72V3626/72V3636/72V3646 CMOS 3.3V TRIPLE BUS SyncFIFO WITH BUS-MATCHING 256 512 1,024 CLKA CSA LOW WRA HIGH t t ENS2 ENH MBA t t ENS2 ENH ENA IRA HIGH ...

Page 25

IDT72V3626/72V3636/72V3646 CMOS 3.3V TRIPLE BUS SyncFIFO IDT72V3626/72V3636/72V3646 CMOS 3.3V Triple Bus SyncFIFO WITH BUS-MATCHING 256 512 1,024 with Bus-Matching 256x36x2, 512x36x2, 1,024x36x2 CLKA CSA LOW WRA HIGH t ...

Page 26

IDT72V3626/72V3636/72V3646 CMOS 3.3V TRIPLE BUS SyncFIFO WITH BUS-MATCHING 256 512 1,024 CLKC t ENS2 MBC t ENS2 WENC IRC HIGH C0-C17 Write ...

Page 27

IDT72V3626/72V3636/72V3646 CMOS 3.3V TRIPLE BUS SyncFIFO IDT72V3626/72V3636/72V3646 CMOS 3.3V Triple Bus SyncFIFO WITH BUS-MATCHING 256 512 1,024 with Bus-Matching 256x36x2, 512x36x2, 1,024x36x2 CLKC t ENS2 MBC t ENS2 ...

Page 28

IDT72V3626/72V3636/72V3646 CMOS 3.3V TRIPLE BUS SyncFIFO WITH BUS-MATCHING 256 512 1,024 CLK t t CLKH CLKL CLKB CSB LOW LOW MBB t ENS2 RENB ORB HIGH t ...

Page 29

IDT72V3626/72V3636/72V3646 CMOS 3.3V TRIPLE BUS SyncFIFO IDT72V3626/72V3636/72V3646 CMOS 3.3V Triple Bus SyncFIFO WITH BUS-MATCHING 256 512 1,024 with Bus-Matching 256x36x2, 512x36x2, 1,024x36x2 t CLK t t CLKH CLKL ...

Page 30

IDT72V3626/72V3636/72V3646 CMOS 3.3V TRIPLE BUS SyncFIFO WITH BUS-MATCHING 256 512 1,024 CLK t t CLKH CLKL CLKA CSA LOW W/RA LOW LOW MBA t ENS2 ENA ORA ...

Page 31

IDT72V3626/72V3636/72V3646 CMOS 3.3V TRIPLE BUS SyncFIFO IDT72V3626/72V3636/72V3646 CMOS 3.3V Triple Bus SyncFIFO WITH BUS-MATCHING 256 512 1,024 with Bus-Matching 256x36x2, 512x36x2, 1,024x36x2 t CLK t t CLKH CLKL ...

Page 32

IDT72V3626/72V3636/72V3646 CMOS 3.3V TRIPLE BUS SyncFIFO WITH BUS-MATCHING 256 512 1,024 CLKC t t ENH ENS2 WENC t SKEW2 CLKA AEA X2 Words in FIFO2 ENA NOTES: is ...

Page 33

IDT72V3626/72V3636/72V3646 CMOS 3.3V TRIPLE BUS SyncFIFO IDT72V3626/72V3636/72V3646 CMOS 3.3V Triple Bus SyncFIFO WITH BUS-MATCHING 256 512 1,024 with Bus-Matching 256x36x2, 512x36x2, 1,024x36x2 CLKA t ENS1 CSA t ENS2 ...

Page 34

IDT72V3626/72V3636/72V3646 CMOS 3.3V TRIPLE BUS SyncFIFO WITH BUS-MATCHING 256 512 1,024 CLKC t ENS2 MBC t ENS2 ENC C0-C17 CLKA MBF2 CSA W/RA MBA ENA t EN A0-A35 ...

Page 35

IDT72V3626/72V3636/72V3646 CMOS 3.3V TRIPLE BUS SyncFIFO IDT72V3626/72V3636/72V3646 CMOS 3.3V Triple Bus SyncFIFO WITH BUS-MATCHING 256 512 1,024 with Bus-Matching 256x36x2, 512x36x2, 1,024x36x2 PARAMETER MEASUREMENT INFORMATION From Output Timing ...

Page 36

ORDERING INFORMATION XXXXXX Device Type Power Speed Package NOTES: 1. Industrial temperature range is available by special order. 2. Green parts available. For specific speeds and packages contact your sales office. DATASHEET DOCUMENT HISTORY 12/12/2000 pgs. 12 ...

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