IDT72V3674L15PF IDT, Integrated Device Technology Inc, IDT72V3674L15PF Datasheet - Page 27

IC FIFO 16384X36 15NS 128QFP

IDT72V3674L15PF

Manufacturer Part Number
IDT72V3674L15PF
Description
IC FIFO 16384X36 15NS 128QFP
Manufacturer
IDT, Integrated Device Technology Inc
Series
72Vr
Datasheet

Specifications of IDT72V3674L15PF

Function
Asynchronous
Memory Size
576K (16K x 36)
Data Rate
67MHz
Access Time
15ns
Voltage - Supply
3.15 V ~ 3.45 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
128-TQFP, 128-VQFP
Configuration
Dual
Density
576Kb
Access Time (max)
10ns
Word Size
36b
Organization
8Kx36x2
Sync/async
Synchronous
Expandable
No
Bus Direction
Bi-Directional
Package Type
TQFP
Clock Freq (max)
66.7MHz
Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (min)
3.15V
Operating Supply Voltage (max)
3.45V
Supply Current
400mA
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
128
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
72V3674L15PF
NOTES:
1. t
2. If Port B size is word or byte, t
A0-A35
B0-B35
IDT72V3654/72V3664/72V3674 3.3V CMOS SyncBiFIFO
2,048 x 36 x 2, 4,096 x 36 x 2 and 8,192 x 36 x 2
CLKA edge is less than t
W/RA
CLKB
W/RB
CLKA
SKEW1
MBA
MBB
ENB
CSA
CSB
EFA
ENA
FFB
is the minimum time between a rising CLKB edge and a rising CLKA edge for EFA to transition HIGH in the next CLKA cycle. If the time between the rising CLKB edge and rising
LOW
HIGH
FIFO2 Empty
LOW
LOW
LOW
LOW
t
t
ENS2
ENS2
SKEW1
t
DS
Figure 18. EFA
SKEW1
, then the transition of EFA HIGH may occur one CLKA cycle later than shown.
is referenced to the rising CLKB edge that writes the last word or byte of the long word, respectively.
W1
EFA
EFA
EFA
EFA Flag Timing and First Data Read when FIFO2 is Empty (IDT Standard Mode)
t
SKEW1
t
t
t
ENH
ENH
DH
(1)
t
CLKH
1
t
CLK
t
CLKL
TM
WITH BUS-MATCHING
27
t
REF
2
t
CLKH
t
ENS2
t
CLK
t
CLKL
t
REF
t
A
t
ENH
COMMERCIAL TEMPERATURE RANGE
W1
4664 drw20

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