AD9642BCPZRL7-250 Analog Devices, Inc., AD9642BCPZRL7-250 Datasheet - Page 5

• Manufacturer Part Number: AD9642BCPZRL7-250
• Description: 14-bit, 170 Msps/210 Msps/250 Msps, 1.8 V Analog-to-digital Converter Adc
• Manufacturer: Analog Devices, Inc.

Parameter
FULL POWER BANDWIDTH
NOISE BANDWIDTH
1
2
3
DIGITAL SPECIFICATIONS
AVDD = 1.8 V, DRVDD = 1.8 V, maximum sample rate, VIN = −1.0 dBFS differential input, 1.0 V internal reference,
DCS enabled, unless otherwise noted.
Table 3.
Parameter
DIFFERENTIAL CLOCK INPUTS (CLK+, CLK−)
LOGIC INPUT (CSB)
LOGIC INPUT (SCLK)
LOGIC INPUTS (SDIO)
DIGITAL OUTPUTS
1
2
See the
Full power bandwidth is the bandwidth of operation where typical ADC performance can be achieved.
Noise bandwidth is the −3 dB bandwidth for the ADC inputs across which noise may enter the ADC and is not attenuated internally.
Pull-up.
Pull-down.
Logic Compliance
Internal Common-Mode Bias
Differential Input Voltage
Input Voltage Range
Input Common-Mode Range
High Level Input Current
Low Level Input Current
Input Capacitance
Input Resistance
High Level Input Voltage
Low Level Input Voltage
High Level Input Current
Low Level Input Current
Input Resistance
Input Capacitance
High Level Input Voltage
Low Level Input Voltage
High Level Input Current
Low Level Input Current
Input Resistance
Input Capacitance
High Level Input Voltage
Low Level Input Voltage
High Level Input Current
Low Level Input Current
Input Resistance
Input Capacitance
LVDS Data and OR Outputs (OR+, OR−)
Differential Output Voltage (V
Output Offset Voltage (V
Differential Output Voltage (V
Output Offset Voltage (V
AN-835 Application
1
1
3
2
1
Note, Understanding High Speed ADC Testing and Evaluation, for a complete set of definitions.
2
OS
OS
), ANSI Mode
), Reduced Swing Mode
OD
OD
), ANSI Mode
), Reduced Swing Mode
Temperature
25°C
25°C
Min
Rev. 0 | Page 5 of 28
AD9642-170
Typ
350
1000
Temperature
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Max
Min
Min
0.3
AGND
0.9
10
−22
12
1.22
0
50
−5
1.22
0
45
−5
1.22
0
45
−5
250
1.15
150
1.15
AD9642-210
Typ
350
1000
CMOS/LVDS/LVPECL
Max
Typ
0.9
4
15
26
2
26
2
26
5
350
1.25
200
1.25
Min
AD9642-250
Max
3.6
AVDD
1.4
−10
18
2.1
0.6
+5
2.1
0.6
+5
2.1
0.6
+5
450
1.35
280
1.35
22
71
70
70
Typ
350
1000
Max
AD9642
Unit
V
V p-p
V
V
μA
μA
pF
kΩ
V
V
μA
μA
kΩ
pF
V
V
μA
μA
kΩ
pF
V
V
μA
μA
kΩ
pF
mV
V
mV
V
Unit
MHz
MHz