upd72872 Renesas Electronics Corporation., upd72872 Datasheet - Page 11

• Manufacturer Part Number: upd72872
• Description: Ieee1394 1-chip Ohci Host Controller
• Manufacturer: Renesas Electronics Corporation.

CLKRUN
INTA
PERR
SERR
PRST
PCLK
Remark
Name
*: If the Link pin is pulled up, it should be connected to L_V
I/O
I/O
I/O
O
O
I
I
2
4
41
42
5
6
Pin No.
PCI/Cardbus
PCI/Cardbus
PCI/Cardbus
PCI/Cardbus
I
OL
-
-
Data Sheet S14793EJ1V0DS
Volts(V)
5/3.3
5/3.3
5/3.3
5/3.3
5/3.3
5/3.3
PCICLK Running as input, to determine the status
of PCLK; as output, to request starting or speeding
up clock.
Interrupt the PCI interrupt request A.
Parity Error is used for reporting data parity errors
during all PCI transactions, except a Special Cycle.
It is an output when AD0-AD31 and PAR are both
inputs. It is an input when AD0-AD31 and PAR are
both outputs.
System Error is used for reporting address parity
errors, data parity errors during the Special Cycle, or
any other system error where the effect can be
catastrophic. When reporting address parity errors,
it is an output.
Reset PCI reset
PCI Clock 33 MHz system bus clock.
DD
.
Function
Block *
Link
Link
Link
Link
Link
Link
(2/2)
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